Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop
This paper presents a low-noise chopper-stabilized zero-drift amplifier with successive approximation register (SAR)-assisted automatic offset calibration loop (AOCL). The amplifier is designed using multipath zero-drift architecture including a low frequency path (LFP) and a high frequency path (HF...
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2023-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10347194/ |
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| author | Gibae Nam Gyuri Choi Mookyoung Yoo Sanggyun Kang Byeongkwan Jin Hyeoktae Son Kyounghwan Kim Jihyang Wi Seungmin Ahn Hyoungho Ko |
| author_facet | Gibae Nam Gyuri Choi Mookyoung Yoo Sanggyun Kang Byeongkwan Jin Hyeoktae Son Kyounghwan Kim Jihyang Wi Seungmin Ahn Hyoungho Ko |
| author_sort | Gibae Nam |
| collection | DOAJ |
| description | This paper presents a low-noise chopper-stabilized zero-drift amplifier with successive approximation register (SAR)-assisted automatic offset calibration loop (AOCL). The amplifier is designed using multipath zero-drift architecture including a low frequency path (LFP) and a high frequency path (HFP). The multipath architecture can achieve the low offset, the low noise and the low drift while maintaining the wide bandwidth. The LFP amplifier exploits a chopper scheme to reduce the offset and the low-frequency noise components. The digitally assisted AOCLs in the LFP and the HFP using SAR and current-mode digital-to-analog converter (DAC) can reduce the offset coarsely. The mismatch and the offset of the LFP amplifier can generate the up-modulated output ripples. The residual ripples in the LFP can be reduced using a ripple reduction loop (RRL). To prevent secondary ripple caused by the offset of the RRL itself, an auto-zero (AZ) integrator is employed. The HFP amplifier is designed using the folded-cascode structure with class-AB output stage to enhance the power efficiency. The multipath amplifier is fabricated in a <inline-formula> <tex-math notation="LaTeX">$0.18 ~\mu \text{m}$ </tex-math></inline-formula> CMOS process. The current consumption, supply voltage and active area are <inline-formula> <tex-math notation="LaTeX">$130 ~\mu \text{A}$ </tex-math></inline-formula>, 1.8 V and 0.86 mm2, respectively. The amplifier has a unit gain bandwidth (UGBW) of 0.875 MHz, an input referred offset of <inline-formula> <tex-math notation="LaTeX">$4.6 ~\mu \text{V}$ </tex-math></inline-formula>, an input referred noise of 25.6 nV/<inline-formula> <tex-math notation="LaTeX">$\surd $ </tex-math></inline-formula>Hz, an offset drift of 53 nV/°C and a noise efficiency factor (NEF) of 11.2. |
| format | Article |
| id | doaj-art-d56dbae0c1e4469c8eee6b82166fd127 |
| institution | OA Journals |
| issn | 2169-3536 |
| language | English |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-d56dbae0c1e4469c8eee6b82166fd1272025-08-20T01:49:22ZengIEEEIEEE Access2169-35362023-01-011113768813770110.1109/ACCESS.2023.334042710347194Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration LoopGibae Nam0Gyuri Choi1https://orcid.org/0000-0002-2168-5251Mookyoung Yoo2Sanggyun Kang3https://orcid.org/0000-0002-6974-9736Byeongkwan Jin4Hyeoktae Son5Kyounghwan Kim6Jihyang Wi7Seungmin Ahn8Hyoungho Ko9https://orcid.org/0000-0001-5348-3585Department of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaDepartment of Electronics Engineering, Chungnam National University, Daejeon, Republic of KoreaThis paper presents a low-noise chopper-stabilized zero-drift amplifier with successive approximation register (SAR)-assisted automatic offset calibration loop (AOCL). The amplifier is designed using multipath zero-drift architecture including a low frequency path (LFP) and a high frequency path (HFP). The multipath architecture can achieve the low offset, the low noise and the low drift while maintaining the wide bandwidth. The LFP amplifier exploits a chopper scheme to reduce the offset and the low-frequency noise components. The digitally assisted AOCLs in the LFP and the HFP using SAR and current-mode digital-to-analog converter (DAC) can reduce the offset coarsely. The mismatch and the offset of the LFP amplifier can generate the up-modulated output ripples. The residual ripples in the LFP can be reduced using a ripple reduction loop (RRL). To prevent secondary ripple caused by the offset of the RRL itself, an auto-zero (AZ) integrator is employed. The HFP amplifier is designed using the folded-cascode structure with class-AB output stage to enhance the power efficiency. The multipath amplifier is fabricated in a <inline-formula> <tex-math notation="LaTeX">$0.18 ~\mu \text{m}$ </tex-math></inline-formula> CMOS process. The current consumption, supply voltage and active area are <inline-formula> <tex-math notation="LaTeX">$130 ~\mu \text{A}$ </tex-math></inline-formula>, 1.8 V and 0.86 mm2, respectively. The amplifier has a unit gain bandwidth (UGBW) of 0.875 MHz, an input referred offset of <inline-formula> <tex-math notation="LaTeX">$4.6 ~\mu \text{V}$ </tex-math></inline-formula>, an input referred noise of 25.6 nV/<inline-formula> <tex-math notation="LaTeX">$\surd $ </tex-math></inline-formula>Hz, an offset drift of 53 nV/°C and a noise efficiency factor (NEF) of 11.2.https://ieeexplore.ieee.org/document/10347194/Multipath amplifierripple reductionautomatic offset calibration loop (AOCL)SAR |
| spellingShingle | Gibae Nam Gyuri Choi Mookyoung Yoo Sanggyun Kang Byeongkwan Jin Hyeoktae Son Kyounghwan Kim Jihyang Wi Seungmin Ahn Hyoungho Ko Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop IEEE Access Multipath amplifier ripple reduction automatic offset calibration loop (AOCL) SAR |
| title | Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop |
| title_full | Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop |
| title_fullStr | Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop |
| title_full_unstemmed | Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop |
| title_short | Low-Noise Chopper-Stabilized Zero-Drift Amplifier With SAR-Assisted Automatic Offset Calibration Loop |
| title_sort | low noise chopper stabilized zero drift amplifier with sar assisted automatic offset calibration loop |
| topic | Multipath amplifier ripple reduction automatic offset calibration loop (AOCL) SAR |
| url | https://ieeexplore.ieee.org/document/10347194/ |
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