WiFi-TSN low latency conversion architecture

The integration of wireless network and TSN(Time Sensitive Networking) is one of the concerns of industry at present. The traditional gateway based on application layer software has some disadvantages, such as high CPU utilization, long processing delay, poor performance and so on. Therefore, a WiFi...

Full description

Saved in:
Bibliographic Details
Main Authors: Wang Bo, Wang Xuedi, Shi Guangyi, Yan Wei
Format: Article
Language:zho
Published: National Computer System Engineering Research Institute of China 2022-04-01
Series:Dianzi Jishu Yingyong
Subjects:
Online Access:http://www.chinaaet.com/article/3000148312
Tags: Add Tag
No Tags, Be the first to tag this record!
_version_ 1849425484856688640
author Wang Bo
Wang Xuedi
Shi Guangyi
Yan Wei
author_facet Wang Bo
Wang Xuedi
Shi Guangyi
Yan Wei
author_sort Wang Bo
collection DOAJ
description The integration of wireless network and TSN(Time Sensitive Networking) is one of the concerns of industry at present. The traditional gateway based on application layer software has some disadvantages, such as high CPU utilization, long processing delay, poor performance and so on. Therefore, a WiFi TSN low delay conversion architecture is proposed to realize the integration of WiFi network and TSN network. The architecture is implemented in Verilog language, which ensures the predictable delay between communication channels through hardware, and can complete protocol conversion and protocol data forwarding in a very short time. Vivado EDA tool is used to complete the circuit design, and sufficient simulation tests are carried out to evaluate the end-to-end delay performance of the circuit.
format Article
id doaj-art-d4be1944d978488d82b06ca298126da7
institution Kabale University
issn 0258-7998
language zho
publishDate 2022-04-01
publisher National Computer System Engineering Research Institute of China
record_format Article
series Dianzi Jishu Yingyong
spelling doaj-art-d4be1944d978488d82b06ca298126da72025-08-20T03:29:44ZzhoNational Computer System Engineering Research Institute of ChinaDianzi Jishu Yingyong0258-79982022-04-01484242810.16157/j.issn.0258-7998.2227213000148312WiFi-TSN low latency conversion architectureWang Bo0Wang Xuedi1Shi Guangyi2Yan Wei3School of Software and Microelectronics,Peking University,Beijing 102627,ChinaSchool of Software and Microelectronics,Peking University,Beijing 102627,ChinaSchool of Software and Microelectronics,Peking University,Beijing 102627,ChinaSchool of Software and Microelectronics,Peking University,Beijing 102627,ChinaThe integration of wireless network and TSN(Time Sensitive Networking) is one of the concerns of industry at present. The traditional gateway based on application layer software has some disadvantages, such as high CPU utilization, long processing delay, poor performance and so on. Therefore, a WiFi TSN low delay conversion architecture is proposed to realize the integration of WiFi network and TSN network. The architecture is implemented in Verilog language, which ensures the predictable delay between communication channels through hardware, and can complete protocol conversion and protocol data forwarding in a very short time. Vivado EDA tool is used to complete the circuit design, and sufficient simulation tests are carried out to evaluate the end-to-end delay performance of the circuit.http://www.chinaaet.com/article/3000148312tsnwifiprotocol conversionend-to-end delay
spellingShingle Wang Bo
Wang Xuedi
Shi Guangyi
Yan Wei
WiFi-TSN low latency conversion architecture
Dianzi Jishu Yingyong
tsn
wifi
protocol conversion
end-to-end delay
title WiFi-TSN low latency conversion architecture
title_full WiFi-TSN low latency conversion architecture
title_fullStr WiFi-TSN low latency conversion architecture
title_full_unstemmed WiFi-TSN low latency conversion architecture
title_short WiFi-TSN low latency conversion architecture
title_sort wifi tsn low latency conversion architecture
topic tsn
wifi
protocol conversion
end-to-end delay
url http://www.chinaaet.com/article/3000148312
work_keys_str_mv AT wangbo wifitsnlowlatencyconversionarchitecture
AT wangxuedi wifitsnlowlatencyconversionarchitecture
AT shiguangyi wifitsnlowlatencyconversionarchitecture
AT yanwei wifitsnlowlatencyconversionarchitecture