Realization of Three-level SVPWM Algorithm Based on FPGA
According to the performance of AC-driving digital control system greatly depends on the process speed of controller, field programmable gate array(FPGA) was introduced to reduce the control period. Three-levels space vector pulse width modulation(SVPWM) topological structure and algorithm was intro...
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| Format: | Article |
| Language: | zho |
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Editorial Department of Electric Drive for Locomotives
2016-01-01
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| Series: | 机车电传动 |
| Subjects: | |
| Online Access: | http://edl.csrzic.com/thesisDetails#10.13890/j.issn.1000-128x.2016.06.014 |
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| _version_ | 1850186524036956160 |
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| author | LIN Xin KOU Shuren YANG Fan |
| author_facet | LIN Xin KOU Shuren YANG Fan |
| author_sort | LIN Xin |
| collection | DOAJ |
| description | According to the performance of AC-driving digital control system greatly depends on the process speed of controller, field programmable gate array(FPGA) was introduced to reduce the control period. Three-levels space vector pulse width modulation(SVPWM) topological structure and algorithm was introduced , and its realization with FPGA was described. The simulation and experiment results showed coincidence, and the FPGA could improved the procession speed of the controller. |
| format | Article |
| id | doaj-art-d2b3a9eff746498bb4c8fd1439e4dea4 |
| institution | OA Journals |
| issn | 1000-128X |
| language | zho |
| publishDate | 2016-01-01 |
| publisher | Editorial Department of Electric Drive for Locomotives |
| record_format | Article |
| series | 机车电传动 |
| spelling | doaj-art-d2b3a9eff746498bb4c8fd1439e4dea42025-08-20T02:16:19ZzhoEditorial Department of Electric Drive for Locomotives机车电传动1000-128X2016-01-01646620904689Realization of Three-level SVPWM Algorithm Based on FPGALIN XinKOU ShurenYANG FanAccording to the performance of AC-driving digital control system greatly depends on the process speed of controller, field programmable gate array(FPGA) was introduced to reduce the control period. Three-levels space vector pulse width modulation(SVPWM) topological structure and algorithm was introduced , and its realization with FPGA was described. The simulation and experiment results showed coincidence, and the FPGA could improved the procession speed of the controller.http://edl.csrzic.com/thesisDetails#10.13890/j.issn.1000-128x.2016.06.014three levelsSVPWMFPGAcontrollerprocession speedAC drive |
| spellingShingle | LIN Xin KOU Shuren YANG Fan Realization of Three-level SVPWM Algorithm Based on FPGA 机车电传动 three levels SVPWM FPGA controller procession speed AC drive |
| title | Realization of Three-level SVPWM Algorithm Based on FPGA |
| title_full | Realization of Three-level SVPWM Algorithm Based on FPGA |
| title_fullStr | Realization of Three-level SVPWM Algorithm Based on FPGA |
| title_full_unstemmed | Realization of Three-level SVPWM Algorithm Based on FPGA |
| title_short | Realization of Three-level SVPWM Algorithm Based on FPGA |
| title_sort | realization of three level svpwm algorithm based on fpga |
| topic | three levels SVPWM FPGA controller procession speed AC drive |
| url | http://edl.csrzic.com/thesisDetails#10.13890/j.issn.1000-128x.2016.06.014 |
| work_keys_str_mv | AT linxin realizationofthreelevelsvpwmalgorithmbasedonfpga AT koushuren realizationofthreelevelsvpwmalgorithmbasedonfpga AT yangfan realizationofthreelevelsvpwmalgorithmbasedonfpga |