An RRAM-based implementation of a template matching circuit for low-power analogue classification
Recent advances in machine learning and neuro-inspired systems enabled the increased interest in efficient pattern recognition at the edge. A wide variety of applications, such as near-sensor classification, require fast and low-power approaches for pattern matching through the use of associative me...
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| Format: | Article |
| Language: | English |
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Frontiers Media S.A.
2025-04-01
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| Series: | Frontiers in Electronics |
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| Online Access: | https://www.frontiersin.org/articles/10.3389/felec.2025.1568377/full |
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| author | Patrick Foster Georgios Papandroulidakis Alex Serb Spyros Stathopoulos Themis Prodromakis |
| author_facet | Patrick Foster Georgios Papandroulidakis Alex Serb Spyros Stathopoulos Themis Prodromakis |
| author_sort | Patrick Foster |
| collection | DOAJ |
| description | Recent advances in machine learning and neuro-inspired systems enabled the increased interest in efficient pattern recognition at the edge. A wide variety of applications, such as near-sensor classification, require fast and low-power approaches for pattern matching through the use of associative memories and their more well-known implementation, Content Addressable Memories (CAMs). Towards addressing the need for low-power classification, this work showcases an RRAM-based analogue CAM (ACAM) intended for template matching applications, providing a low-power reconfigurable classification engine for the extreme edge. The circuit uses a low component count at 6T2R2M, comparable with the most compact existing cells of this type. In this work, we demonstrate a hardware prototype, built with Commercial-Off-The-Shelf (COTS) components for the MOSFET-based circuits, that implements rows of 6T2R2M employing TiOx-based RRAM devices developed in-house, showcasing competitive matching window configurability and definition. Furthermore, through simulations, we validate the performance of the proposed circuit by using a commercially available 180 nm technology and in-house RRAM data-driven model to assess the energy dissipation, exhibiting 60 pJ per classification event. |
| format | Article |
| id | doaj-art-d1d4fd6dc6c340b2b3db87e5888d4bdc |
| institution | OA Journals |
| issn | 2673-5857 |
| language | English |
| publishDate | 2025-04-01 |
| publisher | Frontiers Media S.A. |
| record_format | Article |
| series | Frontiers in Electronics |
| spelling | doaj-art-d1d4fd6dc6c340b2b3db87e5888d4bdc2025-08-20T02:20:16ZengFrontiers Media S.A.Frontiers in Electronics2673-58572025-04-01610.3389/felec.2025.15683771568377An RRAM-based implementation of a template matching circuit for low-power analogue classificationPatrick FosterGeorgios PapandroulidakisAlex SerbSpyros StathopoulosThemis ProdromakisRecent advances in machine learning and neuro-inspired systems enabled the increased interest in efficient pattern recognition at the edge. A wide variety of applications, such as near-sensor classification, require fast and low-power approaches for pattern matching through the use of associative memories and their more well-known implementation, Content Addressable Memories (CAMs). Towards addressing the need for low-power classification, this work showcases an RRAM-based analogue CAM (ACAM) intended for template matching applications, providing a low-power reconfigurable classification engine for the extreme edge. The circuit uses a low component count at 6T2R2M, comparable with the most compact existing cells of this type. In this work, we demonstrate a hardware prototype, built with Commercial-Off-The-Shelf (COTS) components for the MOSFET-based circuits, that implements rows of 6T2R2M employing TiOx-based RRAM devices developed in-house, showcasing competitive matching window configurability and definition. Furthermore, through simulations, we validate the performance of the proposed circuit by using a commercially available 180 nm technology and in-house RRAM data-driven model to assess the energy dissipation, exhibiting 60 pJ per classification event.https://www.frontiersin.org/articles/10.3389/felec.2025.1568377/fullassociative memorycontent addressable memoryresistive RAMRRAM-CMOS designtemplate matching |
| spellingShingle | Patrick Foster Georgios Papandroulidakis Alex Serb Spyros Stathopoulos Themis Prodromakis An RRAM-based implementation of a template matching circuit for low-power analogue classification Frontiers in Electronics associative memory content addressable memory resistive RAM RRAM-CMOS design template matching |
| title | An RRAM-based implementation of a template matching circuit for low-power analogue classification |
| title_full | An RRAM-based implementation of a template matching circuit for low-power analogue classification |
| title_fullStr | An RRAM-based implementation of a template matching circuit for low-power analogue classification |
| title_full_unstemmed | An RRAM-based implementation of a template matching circuit for low-power analogue classification |
| title_short | An RRAM-based implementation of a template matching circuit for low-power analogue classification |
| title_sort | rram based implementation of a template matching circuit for low power analogue classification |
| topic | associative memory content addressable memory resistive RAM RRAM-CMOS design template matching |
| url | https://www.frontiersin.org/articles/10.3389/felec.2025.1568377/full |
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