An RRAM-based implementation of a template matching circuit for low-power analogue classification

An RRAM-based implementation of a template matching circuit for low-power analogue classification

Recent advances in machine learning and neuro-inspired systems enabled the increased interest in efficient pattern recognition at the edge. A wide variety of applications, such as near-sensor classification, require fast and low-power approaches for pattern matching through the use of associative me...

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Bibliographic Details
Main Authors: Patrick Foster, Georgios Papandroulidakis, Alex Serb, Spyros Stathopoulos, Themis Prodromakis
Format: Article
Language:English
Published: Frontiers Media S.A. 2025-04-01
Series:Frontiers in Electronics
Subjects:
associative memory
content addressable memory
resistive RAM
RRAM-CMOS design
template matching
Online Access:https://www.frontiersin.org/articles/10.3389/felec.2025.1568377/full
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Summary:Recent advances in machine learning and neuro-inspired systems enabled the increased interest in efficient pattern recognition at the edge. A wide variety of applications, such as near-sensor classification, require fast and low-power approaches for pattern matching through the use of associative memories and their more well-known implementation, Content Addressable Memories (CAMs). Towards addressing the need for low-power classification, this work showcases an RRAM-based analogue CAM (ACAM) intended for template matching applications, providing a low-power reconfigurable classification engine for the extreme edge. The circuit uses a low component count at 6T2R2M, comparable with the most compact existing cells of this type. In this work, we demonstrate a hardware prototype, built with Commercial-Off-The-Shelf (COTS) components for the MOSFET-based circuits, that implements rows of 6T2R2M employing TiOx-based RRAM devices developed in-house, showcasing competitive matching window configurability and definition. Furthermore, through simulations, we validate the performance of the proposed circuit by using a commercially available 180 nm technology and in-house RRAM data-driven model to assess the energy dissipation, exhibiting 60 pJ per classification event.
ISSN:2673-5857

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