Huang, Y., Lu, Y., & Chen, W. A 10 GHz Dual-Loop PLL With Active Cycle-Jitter Correction Achieving 12dB Spur and 29% Jitter Reduction. IEEE.
Chicago Style (17th ed.) CitationHuang, Yu-Ping, Yu-Sian Lu, and Wei-Zen Chen. A 10 GHz Dual-Loop PLL With Active Cycle-Jitter Correction Achieving 12dB Spur and 29% Jitter Reduction. IEEE.
MLA (9th ed.) CitationHuang, Yu-Ping, et al. A 10 GHz Dual-Loop PLL With Active Cycle-Jitter Correction Achieving 12dB Spur and 29% Jitter Reduction. IEEE.
Warning: These citations may not always be 100% accurate.