Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing
Moore's Law represents the cumulative effort by many participants to advance the productivity of electronic systems over the last 40+ years, resulting in enormous strides in the capability and ubiquity of electronics. This paper identifies the innovation challenges the semiconductor industry mu...
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| Format: | Article |
| Language: | English |
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IEEE
2013-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
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| Online Access: | https://ieeexplore.ieee.org/document/6548056/ |
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| _version_ | 1850201200677355520 |
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| author | Klaus Schuegraf Mathew C. Abraham Adam Brand Mehul Naik Randhir Thakur |
| author_facet | Klaus Schuegraf Mathew C. Abraham Adam Brand Mehul Naik Randhir Thakur |
| author_sort | Klaus Schuegraf |
| collection | DOAJ |
| description | Moore's Law represents the cumulative effort by many participants to advance the productivity of electronic systems over the last 40+ years, resulting in enormous strides in the capability and ubiquity of electronics. This paper identifies the innovation challenges the semiconductor industry must overcome in order to propel the advance of semiconductor technology to the cadence of Moore's Law. Key examples will highlight the solutions needed to enable advanced transistor and nano-scale interconnect fabrication. Solutions for tomorrow's low voltage, low power process technologies will introduce new materials, unprecedented levels of interface control and new energy sources while at the same time addressing the increasing cost and complexity needed to sustain Moore's Law well into the future. |
| format | Article |
| id | doaj-art-cf4af0b32a11405dbddee57e5efbf830 |
| institution | OA Journals |
| issn | 2168-6734 |
| language | English |
| publishDate | 2013-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj-art-cf4af0b32a11405dbddee57e5efbf8302025-08-20T02:12:06ZengIEEEIEEE Journal of the Electron Devices Society2168-67342013-01-0113667510.1109/JEDS.2013.22715826548056Semiconductor Logic Technology Innovation to Achieve Sub-10 nm ManufacturingKlaus Schuegraf0Mathew C. Abraham1Adam Brand2Mehul Naik3Randhir Thakur4Cymer, Inc., San Diego, CA, USAApplied Materials, Santa Clara, CA, USAApplied Materials, Santa Clara, CA, USAApplied Materials, Santa Clara, CA, USAApplied Materials, Santa Clara, CA, USAMoore's Law represents the cumulative effort by many participants to advance the productivity of electronic systems over the last 40+ years, resulting in enormous strides in the capability and ubiquity of electronics. This paper identifies the innovation challenges the semiconductor industry must overcome in order to propel the advance of semiconductor technology to the cadence of Moore's Law. Key examples will highlight the solutions needed to enable advanced transistor and nano-scale interconnect fabrication. Solutions for tomorrow's low voltage, low power process technologies will introduce new materials, unprecedented levels of interface control and new energy sources while at the same time addressing the increasing cost and complexity needed to sustain Moore's Law well into the future.https://ieeexplore.ieee.org/document/6548056/Device scalingsemiconductor manufacturing |
| spellingShingle | Klaus Schuegraf Mathew C. Abraham Adam Brand Mehul Naik Randhir Thakur Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing IEEE Journal of the Electron Devices Society Device scaling semiconductor manufacturing |
| title | Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing |
| title_full | Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing |
| title_fullStr | Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing |
| title_full_unstemmed | Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing |
| title_short | Semiconductor Logic Technology Innovation to Achieve Sub-10 nm Manufacturing |
| title_sort | semiconductor logic technology innovation to achieve sub 10 nm manufacturing |
| topic | Device scaling semiconductor manufacturing |
| url | https://ieeexplore.ieee.org/document/6548056/ |
| work_keys_str_mv | AT klausschuegraf semiconductorlogictechnologyinnovationtoachievesub10nmmanufacturing AT mathewcabraham semiconductorlogictechnologyinnovationtoachievesub10nmmanufacturing AT adambrand semiconductorlogictechnologyinnovationtoachievesub10nmmanufacturing AT mehulnaik semiconductorlogictechnologyinnovationtoachievesub10nmmanufacturing AT randhirthakur semiconductorlogictechnologyinnovationtoachievesub10nmmanufacturing |