Steep Subthreshold Slope Gate-Controlled Carrier-Injection SOI Transistor for Ultralow Power Applications

In this study, we investigated the basic characteristics of the n- and p-type gate-controlled carrier-injection silicon-on-insulator transistor (GCCI SOI-Tr). The devices exhibited steep subthreshold slope (< 1 mV/dec) and realized ultralow voltage swing (< 0.2 V) from the low...

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Bibliographic Details
Main Authors: Haruki Yonezaki, Takayuki Mori, Jiro Ida
Format: Article
Language:English
Published: IEEE 2025-01-01
Series:IEEE Journal of the Electron Devices Society
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Online Access:https://ieeexplore.ieee.org/document/10855637/
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Summary:In this study, we investigated the basic characteristics of the n- and p-type gate-controlled carrier-injection silicon-on-insulator transistor (GCCI SOI-Tr). The devices exhibited steep subthreshold slope (&#x003C; 1 mV/dec) and realized ultralow voltage swing (&#x003C; 0.2 V) from the low leakage current level (&#x003C; 1 pA) and the high on-current (&#x003E; <inline-formula> <tex-math notation="LaTeX">$1~\mu $ </tex-math></inline-formula>A) at low drain voltage (=&#x00B1; 0.1 V), respectively. GCCI SOI-Tr has the potential for application as an ultralow power complementary metal-oxide-semiconductor (MOS). Owing to its BiMOS-like structure, GCCI SOI-Tr is compatible with the amplification ability and high impedance by a gate. Therefore, this device is promising for ultralow-power applications.
ISSN:2168-6734