Design Optimization of Transistors Used for Neural Recording
Neurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the t...
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| Format: | Article |
| Language: | English |
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Wiley
2012-01-01
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| Series: | Active and Passive Electronic Components |
| Online Access: | http://dx.doi.org/10.1155/2012/472306 |
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| _version_ | 1832550727889715200 |
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| author | Eric Basham David Parent |
| author_facet | Eric Basham David Parent |
| author_sort | Eric Basham |
| collection | DOAJ |
| description | Neurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the transducer does not provide any signal gain, and characterization of the transducer out of the amplification circuit is required. Furthermore, the circuit requires a complex biasing scheme that must be retuned to compensate for drift. Here we present an alternative strategy based on the gm/Id design approach to optimize a single-stage common-source amplifier design. The gm/Id design approach facilitates in circuit characterization of the neuron-FET and provides insight into approaches to improving the transistor process design for application as a neuron-FET transducer. Simulation data for a test case demonstrates optimization of the transistor design and significant increase in gain over a current mode implementation. |
| format | Article |
| id | doaj-art-cbdf8d15fa18411783fc5935f4761498 |
| institution | Kabale University |
| issn | 0882-7516 1563-5031 |
| language | English |
| publishDate | 2012-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Active and Passive Electronic Components |
| spelling | doaj-art-cbdf8d15fa18411783fc5935f47614982025-02-03T06:05:57ZengWileyActive and Passive Electronic Components0882-75161563-50312012-01-01201210.1155/2012/472306472306Design Optimization of Transistors Used for Neural RecordingEric Basham0David Parent1Electrical Engineering Department, San Jose State University, San Jose, CA 95192-0084, USAElectrical Engineering Department, San Jose State University, San Jose, CA 95192-0084, USANeurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the transducer does not provide any signal gain, and characterization of the transducer out of the amplification circuit is required. Furthermore, the circuit requires a complex biasing scheme that must be retuned to compensate for drift. Here we present an alternative strategy based on the gm/Id design approach to optimize a single-stage common-source amplifier design. The gm/Id design approach facilitates in circuit characterization of the neuron-FET and provides insight into approaches to improving the transistor process design for application as a neuron-FET transducer. Simulation data for a test case demonstrates optimization of the transistor design and significant increase in gain over a current mode implementation.http://dx.doi.org/10.1155/2012/472306 |
| spellingShingle | Eric Basham David Parent Design Optimization of Transistors Used for Neural Recording Active and Passive Electronic Components |
| title | Design Optimization of Transistors Used for Neural Recording |
| title_full | Design Optimization of Transistors Used for Neural Recording |
| title_fullStr | Design Optimization of Transistors Used for Neural Recording |
| title_full_unstemmed | Design Optimization of Transistors Used for Neural Recording |
| title_short | Design Optimization of Transistors Used for Neural Recording |
| title_sort | design optimization of transistors used for neural recording |
| url | http://dx.doi.org/10.1155/2012/472306 |
| work_keys_str_mv | AT ericbasham designoptimizationoftransistorsusedforneuralrecording AT davidparent designoptimizationoftransistorsusedforneuralrecording |