A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications

This paper proposes a variable gain amplifier (VGA) with reconfigurable DC-offset cancellation (DCOC) for multi-standard applications. In this design, a cell-based design method and some bandwidth extension technologies are adopted to achieve a high data rate and a wide gain control range simultaneo...

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Main Authors: Zhiqing Liu, Yunqiu Wu, Chenxi Zhao, Johannes Benedikt, Kai Kang
Format: Article
Language:English
Published: IEEE 2018-01-01
Series:IEEE Access
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Online Access:https://ieeexplore.ieee.org/document/8447188/
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author Zhiqing Liu
Yunqiu Wu
Chenxi Zhao
Johannes Benedikt
Kai Kang
author_facet Zhiqing Liu
Yunqiu Wu
Chenxi Zhao
Johannes Benedikt
Kai Kang
author_sort Zhiqing Liu
collection DOAJ
description This paper proposes a variable gain amplifier (VGA) with reconfigurable DC-offset cancellation (DCOC) for multi-standard applications. In this design, a cell-based design method and some bandwidth extension technologies are adopted to achieve a high data rate and a wide gain control range simultaneously. In addition, the DCOC having a tunable lower-cutoff frequency can make an optimum compromise between BER and SNR according to the specified baseband standard. The measurements show that the VGA achieves a gain control range from &#x2212;6 dB to 60 dB, a bandwidth beyond 3 GHz, and a tunable lower-cutoff frequency from 0 to 300 kHz. When entering a 2<sup>23</sup>&#x2212;1 pseudo-random bit sequence signal at 5 Gb/s, the VGA consumes 17 mW from a 1.2-V supply and the output data peak-to-peak jitter is less than 40 ps. The VGA is fabricated in a 90-nm CMOS process with a chip size (including all pads) of <inline-formula> <tex-math notation="LaTeX">$0.52\times0.5$ </tex-math></inline-formula> mm<sup>2</sup>.
format Article
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spelling doaj-art-ca048d5c8df64535a46ac558b3bba14c2025-08-20T03:03:25ZengIEEEIEEE Access2169-35362018-01-016541395414610.1109/ACCESS.2018.28672278447188A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard ApplicationsZhiqing Liu0Yunqiu Wu1Chenxi Zhao2https://orcid.org/0000-0001-7166-2755Johannes Benedikt3Kai Kang4https://orcid.org/0000-0003-0616-2994School of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaSchool of Engineering, Cardiff University, Cardiff, U.K.School of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaThis paper proposes a variable gain amplifier (VGA) with reconfigurable DC-offset cancellation (DCOC) for multi-standard applications. In this design, a cell-based design method and some bandwidth extension technologies are adopted to achieve a high data rate and a wide gain control range simultaneously. In addition, the DCOC having a tunable lower-cutoff frequency can make an optimum compromise between BER and SNR according to the specified baseband standard. The measurements show that the VGA achieves a gain control range from &#x2212;6 dB to 60 dB, a bandwidth beyond 3 GHz, and a tunable lower-cutoff frequency from 0 to 300 kHz. When entering a 2<sup>23</sup>&#x2212;1 pseudo-random bit sequence signal at 5 Gb/s, the VGA consumes 17 mW from a 1.2-V supply and the output data peak-to-peak jitter is less than 40 ps. The VGA is fabricated in a 90-nm CMOS process with a chip size (including all pads) of <inline-formula> <tex-math notation="LaTeX">$0.52\times0.5$ </tex-math></inline-formula> mm<sup>2</sup>.https://ieeexplore.ieee.org/document/8447188/CMOS VGAcell-based designhigh data ratereconfigurablemulti-standard applications
spellingShingle Zhiqing Liu
Yunqiu Wu
Chenxi Zhao
Johannes Benedikt
Kai Kang
A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications
IEEE Access
CMOS VGA
cell-based design
high data rate
reconfigurable
multi-standard applications
title A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications
title_full A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications
title_fullStr A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications
title_full_unstemmed A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications
title_short A 5-Gb/s 66 dB CMOS Variable-Gain Amplifier With Reconfigurable DC-Offset Cancellation for Multi-Standard Applications
title_sort 5 gb s 66 db cmos variable gain amplifier with reconfigurable dc offset cancellation for multi standard applications
topic CMOS VGA
cell-based design
high data rate
reconfigurable
multi-standard applications
url https://ieeexplore.ieee.org/document/8447188/
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