Integrating Reconfigurable Hardware-Based Grid for High Performance Computing
FPGAs have shown several characteristics that make them very attractive for high performance computing (HPC). The impressive speed-up factors that they are able to achieve, the reduced power consumption, and the easiness and flexibility of the design process with fast iterations between consecutive...
Saved in:
| Main Authors: | Julio Dondo Gazzano, Francisco Sanchez Molina, Fernando Rincon, Juan Carlos López |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2015-01-01
|
| Series: | The Scientific World Journal |
| Online Access: | http://dx.doi.org/10.1155/2015/272536 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
On-Chip Reconfigurable Hardware Accelerators for Popcount Computations
by: Valery Sklyarov, et al.
Published: (2016-01-01) -
Parameterized Hardware Design on Reconfigurable Computers: An Image Processing Case Study
by: Miaoqing Huang, et al.
Published: (2010-01-01) -
Hardware reconfigurable coding and evolution algorithm based on evolvable hardware
by: Ting WANG, et al.
Published: (2012-08-01) -
A Message-Passing Hardware/Software Cosimulation Environment for Reconfigurable Computing Systems
by: Manuel Saldaña, et al.
Published: (2009-01-01) -
High-Performance Reconfigurable Computing
by: Khaled Benkrid, et al.
Published: (2012-01-01)