High level modeling of Dynamic Reconfigurable FPGAs
As System-on-Chip (SoC) based embedded systems have become a defacto industry standard, their overall design complexity has increased exponentially in recent years, necessitating the introduction of new seamless methodologies and tools to handle the SoC codesign aspects. This paper presents a novel...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2009-01-01
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| Series: | International Journal of Reconfigurable Computing |
| Online Access: | http://dx.doi.org/10.1155/2009/408605 |
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