On the Transconductance of Polysilicon Thin Film Transistors
In order to achieve both driver and display capability for a number of display devices, TFT has attracted attention, model calculations are therefore presented for the grain boundary barrier height, in a polysilicon TFT considering the charge neutrality between the intrinsic free carriers and the gr...
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| Format: | Article |
| Language: | English |
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Sumy State University
2011-01-01
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| Series: | Журнал нано- та електронної фізики |
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| Online Access: | http://jnep.sumdu.edu.ua/download/numbers/2011/3/articles/jnep_2011_V3_N3_28-35.pdf |
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| _version_ | 1850176714790928384 |
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| author | Alka Panwar B.P. Tyagi |
| author_facet | Alka Panwar B.P. Tyagi |
| author_sort | Alka Panwar |
| collection | DOAJ |
| description | In order to achieve both driver and display capability for a number of display devices, TFT has attracted attention, model calculations are therefore presented for the grain boundary barrier height, in a polysilicon TFT considering the charge neutrality between the intrinsic free carriers and the grain boundary trap states. The formation of the potential barrier at a grain boundary is considered due to the trapping of carriers at the localized grain boundary trap states. The trapped charges, influenced by the gate bias voltage and the trapping states density, in turn, have been taken to deplete free carriers near the grain boundary in a device such as polysilicon TFT. The present predictions reveal that the barrier height diversely depends on the gate source voltage (VGS) of a TFT along with other crystal parameter. Finally to obtain the transconductance, the contributions of transverse and longitudinal grain boundary resistances are incorporated in the I-V characteristics of a TFT. For all values of grain size, the transconductance of the device is seen to increase initially with the gate voltage (VGS) which finally appears to be saturated. The dependence of the transconductance on grain size and drain voltage has been thoroughly explored. Good agreement with experimental results is achieved. |
| format | Article |
| id | doaj-art-bdaac91b2a6a4bb1a066ff4f9eafba30 |
| institution | OA Journals |
| issn | 2077-6772 |
| language | English |
| publishDate | 2011-01-01 |
| publisher | Sumy State University |
| record_format | Article |
| series | Журнал нано- та електронної фізики |
| spelling | doaj-art-bdaac91b2a6a4bb1a066ff4f9eafba302025-08-20T02:19:12ZengSumy State UniversityЖурнал нано- та електронної фізики2077-67722011-01-01332835On the Transconductance of Polysilicon Thin Film TransistorsAlka PanwarB.P. TyagiIn order to achieve both driver and display capability for a number of display devices, TFT has attracted attention, model calculations are therefore presented for the grain boundary barrier height, in a polysilicon TFT considering the charge neutrality between the intrinsic free carriers and the grain boundary trap states. The formation of the potential barrier at a grain boundary is considered due to the trapping of carriers at the localized grain boundary trap states. The trapped charges, influenced by the gate bias voltage and the trapping states density, in turn, have been taken to deplete free carriers near the grain boundary in a device such as polysilicon TFT. The present predictions reveal that the barrier height diversely depends on the gate source voltage (VGS) of a TFT along with other crystal parameter. Finally to obtain the transconductance, the contributions of transverse and longitudinal grain boundary resistances are incorporated in the I-V characteristics of a TFT. For all values of grain size, the transconductance of the device is seen to increase initially with the gate voltage (VGS) which finally appears to be saturated. The dependence of the transconductance on grain size and drain voltage has been thoroughly explored. Good agreement with experimental results is achieved.http://jnep.sumdu.edu.ua/download/numbers/2011/3/articles/jnep_2011_V3_N3_28-35.pdfPolysilicon thin film transistorGrain boundaryGrain boundary barrier heightGrain boundary trap statesTransconductance. |
| spellingShingle | Alka Panwar B.P. Tyagi On the Transconductance of Polysilicon Thin Film Transistors Журнал нано- та електронної фізики Polysilicon thin film transistor Grain boundary Grain boundary barrier height Grain boundary trap states Transconductance. |
| title | On the Transconductance of Polysilicon Thin Film Transistors |
| title_full | On the Transconductance of Polysilicon Thin Film Transistors |
| title_fullStr | On the Transconductance of Polysilicon Thin Film Transistors |
| title_full_unstemmed | On the Transconductance of Polysilicon Thin Film Transistors |
| title_short | On the Transconductance of Polysilicon Thin Film Transistors |
| title_sort | on the transconductance of polysilicon thin film transistors |
| topic | Polysilicon thin film transistor Grain boundary Grain boundary barrier height Grain boundary trap states Transconductance. |
| url | http://jnep.sumdu.edu.ua/download/numbers/2011/3/articles/jnep_2011_V3_N3_28-35.pdf |
| work_keys_str_mv | AT alkapanwar onthetransconductanceofpolysiliconthinfilmtransistors AT bptyagi onthetransconductanceofpolysiliconthinfilmtransistors |