3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application

Abstract A new type of ferroelectric memory device with high reliability and complementary metal‐oxide‐semiconductor (CMOS) compatibility characteristics is an important condition for achieving integrated memory and computing chips. Here, 3D stacked ferroelectric memory devices based on ferroelectri...

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Main Authors: Jiajie Yu, Tianyu Wang, Chen Lu, Zhenhai Li, Kangli Xu, Yongkai Liu, Yifan Song, Jialin Meng, Hao Zhu, Qingqing Sun, David Wei Zhang, Lin Chen
Format: Article
Language:English
Published: Wiley-VCH 2025-04-01
Series:Advanced Electronic Materials
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Online Access:https://doi.org/10.1002/aelm.202400438
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author Jiajie Yu
Tianyu Wang
Chen Lu
Zhenhai Li
Kangli Xu
Yongkai Liu
Yifan Song
Jialin Meng
Hao Zhu
Qingqing Sun
David Wei Zhang
Lin Chen
author_facet Jiajie Yu
Tianyu Wang
Chen Lu
Zhenhai Li
Kangli Xu
Yongkai Liu
Yifan Song
Jialin Meng
Hao Zhu
Qingqing Sun
David Wei Zhang
Lin Chen
author_sort Jiajie Yu
collection DOAJ
description Abstract A new type of ferroelectric memory device with high reliability and complementary metal‐oxide‐semiconductor (CMOS) compatibility characteristics is an important condition for achieving integrated memory and computing chips. Here, 3D stacked ferroelectric memory devices based on ferroelectric materials of HfO2 are fabricated. The device exhibits high speed (50 ns), low read voltage (0.5 V), and great reliability with no substantial degradation after 1010 cycles and a 10‐years data retention at 85 °C. The IMP and NAND logic are achieved with stable memory window (>200 mV) across the vertical devices’ interconnection. On this basis, combining with the traditional CMOS logic device, multiple combination logic functions containing NOT, AND, and NOR are achieved by simulation. The collaboration of devices in the vertical direction providing the possibility of combining multi‐bit logic in memory functions and paves the way for the implementation of high‐density, high‐reliability, and low‐energy consumption computing‐in‐memory chips compatible with the CMOS technology.
format Article
id doaj-art-bd7e2d595f6a4f3492f97bbbdecb5b7a
institution DOAJ
issn 2199-160X
language English
publishDate 2025-04-01
publisher Wiley-VCH
record_format Article
series Advanced Electronic Materials
spelling doaj-art-bd7e2d595f6a4f3492f97bbbdecb5b7a2025-08-20T03:06:43ZengWiley-VCHAdvanced Electronic Materials2199-160X2025-04-01114n/an/a10.1002/aelm.2024004383D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory ApplicationJiajie Yu0Tianyu Wang1Chen Lu2Zhenhai Li3Kangli Xu4Yongkai Liu5Yifan Song6Jialin Meng7Hao Zhu8Qingqing Sun9David Wei Zhang10Lin Chen11School of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Integrated Circuits Shandong University Jinan 250100 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaSchool of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai 200433 P. R. ChinaAbstract A new type of ferroelectric memory device with high reliability and complementary metal‐oxide‐semiconductor (CMOS) compatibility characteristics is an important condition for achieving integrated memory and computing chips. Here, 3D stacked ferroelectric memory devices based on ferroelectric materials of HfO2 are fabricated. The device exhibits high speed (50 ns), low read voltage (0.5 V), and great reliability with no substantial degradation after 1010 cycles and a 10‐years data retention at 85 °C. The IMP and NAND logic are achieved with stable memory window (>200 mV) across the vertical devices’ interconnection. On this basis, combining with the traditional CMOS logic device, multiple combination logic functions containing NOT, AND, and NOR are achieved by simulation. The collaboration of devices in the vertical direction providing the possibility of combining multi‐bit logic in memory functions and paves the way for the implementation of high‐density, high‐reliability, and low‐energy consumption computing‐in‐memory chips compatible with the CMOS technology.https://doi.org/10.1002/aelm.2024004383D stacked memory arraycomputing‐in‐memoryhafnium‐based ferroelectric memoryhigh densityhigh reliability
spellingShingle Jiajie Yu
Tianyu Wang
Chen Lu
Zhenhai Li
Kangli Xu
Yongkai Liu
Yifan Song
Jialin Meng
Hao Zhu
Qingqing Sun
David Wei Zhang
Lin Chen
3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application
Advanced Electronic Materials
3D stacked memory array
computing‐in‐memory
hafnium‐based ferroelectric memory
high density
high reliability
title 3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application
title_full 3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application
title_fullStr 3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application
title_full_unstemmed 3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application
title_short 3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application
title_sort 3d nano hafnium based ferroelectric memory vertical array for high density and high reliability logic in memory application
topic 3D stacked memory array
computing‐in‐memory
hafnium‐based ferroelectric memory
high density
high reliability
url https://doi.org/10.1002/aelm.202400438
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