A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search

In this paper, we have designed and implemented a massively parallel FPGA architecture for exhaustive key search on the A5/3 encryption algorithm. A5/3 is based on KASUMI, it has an effective key of 64 bits, and it is used in GSM (2G) mobile telephony systems. Despite the widespread adoption of mor...

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Main Authors: Konstantina Miteloudi, Lejla Batina, Nele Mentens
Format: Article
Language:English
Published: Ruhr-Universität Bochum 2025-06-01
Series:Transactions on Cryptographic Hardware and Embedded Systems
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Online Access:https://tches.iacr.org/index.php/TCHES/article/view/12220
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author Konstantina Miteloudi
Lejla Batina
Nele Mentens
author_facet Konstantina Miteloudi
Lejla Batina
Nele Mentens
author_sort Konstantina Miteloudi
collection DOAJ
description In this paper, we have designed and implemented a massively parallel FPGA architecture for exhaustive key search on the A5/3 encryption algorithm. A5/3 is based on KASUMI, it has an effective key of 64 bits, and it is used in GSM (2G) mobile telephony systems. Despite the widespread adoption of more advanced technologies (4G, 5G), 2G networks remain as fallback options. In our novel hardware architecture, we use an AMD-Xilinx Alveo U250 card, with its FPGA configured to operate with 104 cores clocked at 496.7 M Hz, that can evaluate 235.59 keys/sec. Our results show that the $1 million attack can be achieved with 128 Alveo U250 cards, on average, in 16 days.
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publisher Ruhr-Universität Bochum
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series Transactions on Cryptographic Hardware and Embedded Systems
spelling doaj-art-bd58258f55c948c3a5fa117a24c5aa942025-08-20T03:26:16ZengRuhr-Universität BochumTransactions on Cryptographic Hardware and Embedded Systems2569-29252025-06-012025310.46586/tches.v2025.i3.361-388A5/3 make or break: A massively parallel FPGA architecture for exhaustive key searchKonstantina Miteloudi0Lejla Batina1Nele Mentens2DiS Group, Radboud University, Nijmegen, The NetherlandsDiS Group, Radboud University, Nijmegen, The NetherlandsES&S-COSIC, ESAT, KU Leuven, Leuven, Belgium; LIACS, Leiden University, Leiden, The Netherlands In this paper, we have designed and implemented a massively parallel FPGA architecture for exhaustive key search on the A5/3 encryption algorithm. A5/3 is based on KASUMI, it has an effective key of 64 bits, and it is used in GSM (2G) mobile telephony systems. Despite the widespread adoption of more advanced technologies (4G, 5G), 2G networks remain as fallback options. In our novel hardware architecture, we use an AMD-Xilinx Alveo U250 card, with its FPGA configured to operate with 104 cores clocked at 496.7 M Hz, that can evaluate 235.59 keys/sec. Our results show that the $1 million attack can be achieved with 128 Alveo U250 cards, on average, in 16 days. https://tches.iacr.org/index.php/TCHES/article/view/12220GSMA5/3KASUMICloud FPGAExhaustive key search attack
spellingShingle Konstantina Miteloudi
Lejla Batina
Nele Mentens
A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search
Transactions on Cryptographic Hardware and Embedded Systems
GSM
A5/3
KASUMI
Cloud FPGA
Exhaustive key search attack
title A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search
title_full A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search
title_fullStr A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search
title_full_unstemmed A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search
title_short A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search
title_sort a5 3 make or break a massively parallel fpga architecture for exhaustive key search
topic GSM
A5/3
KASUMI
Cloud FPGA
Exhaustive key search attack
url https://tches.iacr.org/index.php/TCHES/article/view/12220
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