Demonstration of Integrated Quasi-Vertical DMOS Compatible with the Bipolar-CMOS-DMOS Process Achieving Ultralow R<sub>ON,sp</sub>

Demonstration of Integrated Quasi-Vertical DMOS Compatible with the Bipolar-CMOS-DMOS Process Achieving Ultralow R<sub>ON,sp</sub>

An integrated quasi-vertical double-diffused MOSFET (DMOS) with split-gate trench (SGT) structure (SGT-QVDMOS), whose specific ON-state resistance (R<sub>ON,sp</sub>) breaks the traditional Si limit significantly, is proposed and fabricated. The measured data of the latest manufactured d...

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Bibliographic Details
Main Authors: Feng Lin, Tuanzhuang Wu, Weidong Wang, Zhengxuan Wang, Yi Zhang, Sheng Li, Ran Ye, Long Zhang, Jiaxing Wei, Siyang Liu, Weifeng Sun
Format: Article
Language:English
Published: MDPI AG 2025-01-01
Series:Nanomaterials
Subjects:
quasi-vertical structure
DMOS
SGT
BCD process
specific ON-state resistance
Online Access:https://www.mdpi.com/2079-4991/15/3/172
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