Design and realization of a high-speed traffic collection and processing scheme for campus networks using FPGA

Design and realization of a high-speed traffic collection and processing scheme for campus networks using FPGA

The study captures the entire traffic data stream of the campus network using the SDN architecture, followed by parsing and processing with FPGA technology to generate application-level log data at different levels. Subsequent analysis and mining with big data techniques provide data support for cam...

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Bibliographic Details
Main Authors: YAO Renlong, ZHAO Qiong, HE Haitao, WEI Yujun, LI Enlei
Format: Article
Language:zho
Published: Editorial Department of Journal on Communications 2024-11-01
Series:Tongxin xuebao
Subjects:
FPGA
SDN
traffic collection
security analysis
Online Access:http://www.joconline.com.cn/zh/article/doi/10.11959/j.issn.1000-436x.2024257/
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