High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure
A fully integrated Ku-band transmit/receive (T/R) switch based on a two-stage equivalent transmission line structure has been designed using a 180-nm complementary metal-oxide-semiconductor (CMOS) process. An analysis shows a relation between the series inductance and turn-on resistance for high iso...
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| Format: | Article |
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IEEE
2017-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/8064630/ |
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| author | Chenxi Zhao Yipeng Wu Huihua Liu Yunqiu Wu KAI Kang |
| author_facet | Chenxi Zhao Yipeng Wu Huihua Liu Yunqiu Wu KAI Kang |
| author_sort | Chenxi Zhao |
| collection | DOAJ |
| description | A fully integrated Ku-band transmit/receive (T/R) switch based on a two-stage equivalent transmission line structure has been designed using a 180-nm complementary metal-oxide-semiconductor (CMOS) process. An analysis shows a relation between the series inductance and turn-on resistance for high isolation. A stack structure with feed-forward capacitors was chosen as a means of improving the power-handling capability of the switch. A low insertion loss (IL) of the switch was achieved by eliminating series transistors. The measured minimum ILs of the switch in the transmitter (TX) and receiver (RX) modes are 2.7 dB and 2.3 dB, respectively. The measured isolations in the TX and RX modes are greater than 34 and 25 dB, respectively, from 15 to 18 GHz. The design reaches a measured input 1-dB power compression point (<inline-formula> <tex-math notation="LaTeX">$IP_{1}dB$ </tex-math></inline-formula>) of 22 dBm at 17 GHz. The switch achieves stringent isolation, insertion loss, and power-handling capability requirements along with the capability of full integration, demonstrating its great potential for use in fully integrated CMOS T/R chips. |
| format | Article |
| id | doaj-art-b40bef9c4d0445ada14d01af4cc35b6c |
| institution | DOAJ |
| issn | 2169-3536 |
| language | English |
| publishDate | 2017-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-b40bef9c4d0445ada14d01af4cc35b6c2025-08-20T03:08:25ZengIEEEIEEE Access2169-35362017-01-015227042271210.1109/ACCESS.2017.27619058064630High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line StructureChenxi Zhao0https://orcid.org/0000-0001-7166-2755Yipeng Wu1Huihua Liu2Yunqiu Wu3KAI Kang4https://orcid.org/0000-0003-0616-2994Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaDepartment of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaDepartment of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaDepartment of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaDepartment of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, ChinaA fully integrated Ku-band transmit/receive (T/R) switch based on a two-stage equivalent transmission line structure has been designed using a 180-nm complementary metal-oxide-semiconductor (CMOS) process. An analysis shows a relation between the series inductance and turn-on resistance for high isolation. A stack structure with feed-forward capacitors was chosen as a means of improving the power-handling capability of the switch. A low insertion loss (IL) of the switch was achieved by eliminating series transistors. The measured minimum ILs of the switch in the transmitter (TX) and receiver (RX) modes are 2.7 dB and 2.3 dB, respectively. The measured isolations in the TX and RX modes are greater than 34 and 25 dB, respectively, from 15 to 18 GHz. The design reaches a measured input 1-dB power compression point (<inline-formula> <tex-math notation="LaTeX">$IP_{1}dB$ </tex-math></inline-formula>) of 22 dBm at 17 GHz. The switch achieves stringent isolation, insertion loss, and power-handling capability requirements along with the capability of full integration, demonstrating its great potential for use in fully integrated CMOS T/R chips.https://ieeexplore.ieee.org/document/8064630/CMOS transmit/receive (T/R) switchlumped equivalent transmission line structureinsertion lossisolationpower-handling capabilityfull integration |
| spellingShingle | Chenxi Zhao Yipeng Wu Huihua Liu Yunqiu Wu KAI Kang High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure IEEE Access CMOS transmit/receive (T/R) switch lumped equivalent transmission line structure insertion loss isolation power-handling capability full integration |
| title | High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure |
| title_full | High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure |
| title_fullStr | High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure |
| title_full_unstemmed | High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure |
| title_short | High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure |
| title_sort | high isolation cmos t r switch design using a two stage equivalent transmission line structure |
| topic | CMOS transmit/receive (T/R) switch lumped equivalent transmission line structure insertion loss isolation power-handling capability full integration |
| url | https://ieeexplore.ieee.org/document/8064630/ |
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