Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication
Abstract Arithmetic logic units (ALUs) are core components of processing devices that perform required arithmetic and logical operations such as multiplication, division, addition, subtraction, and squaring. The multiplication operation is frequently used in ALUs in engineering applications such as...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2021-08-01
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| Series: | IET Circuits, Devices and Systems |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/cds2.12041 |
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