Diagnosis of Open and Short Circuit Intermittent Connection Faults for DeviceNet Based on Multilayer Information Fusion and Circuit Network Analysis
DeviceNet plays an important role in manufacturing automation systems, hence the reliability of DeviceNet networks determines system performance and even operation safety. Intermittent connections (ICs) are randomly recurring cable transient misconnection faults, which may degrade network reliabilit...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10819405/ |
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| Summary: | DeviceNet plays an important role in manufacturing automation systems, hence the reliability of DeviceNet networks determines system performance and even operation safety. Intermittent connections (ICs) are randomly recurring cable transient misconnection faults, which may degrade network reliability and, in severe cases, even lead to system-wide failures. Typical ICs are intermittent open circuit (IOC) and intermittent short circuit (ISC). However, there is no diagnostic method for mixed IC faults where IOC and ISC coexist. This paper proposes a novel mixed IC fault diagnosis method for DeviceNet based on multilayer information fusion and circuit network analysis to identify the types and locations of IOC and ISC faults. First, the error patterns of different IC fault types are obtained for fault identification through a hybrid analysis of logic and analog signals. Then, the alarms are defined by analyzing the voltage drop behavior of the circuit network upon faults to target the fault scope. Next, by mapping the fault scope to exact cable links using an undirected graph-based topology representation, the possibilities of faults occurring on every link are derived based on the mapping relationships and corresponding alarms. Finally, a search-based locating algorithm is developed using the possibility order and observed network states to pinpoint IOC and ISC faults separately. The testbed is constructed and case studies are conducted to demonstrate the effectiveness of the proposed method in various fault scenarios and network scales. Experiment results show that the types and locations of mixed IC faults identified by the proposed method agree well with the experiment setups. |
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| ISSN: | 2169-3536 |