Synthesis algorithm of low sensitivity non‐separable N‐D finite impulse response filters configured of fast orthogonal 1‐D rotation structures implemented in field programmable gate arrays IC
Abstract In the article, a low sensitivity synthesis algorithm of a non‐separable N‐dimensional (N‐D) finite impulse response filter implemented in Field Programmable Gate Arrays (FPGA) is proposed. The synthesis and implementation algorithms determine a pipelined non‐separable N‐D finite impulse re...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2022-06-01
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| Series: | IET Signal Processing |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/sil2.12118 |
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