Role of Oxygen Vacancy in the Performance Variability and Lattice Temperature of the Stacked Nanosheet FET
We have carried out a detailed study of the impact of oxygen vacancies (O<inline-formula> <tex-math notation="LaTeX">$_{\mathrm {V}}$ </tex-math></inline-formula>), on the performance and the lattice temperature variation in a stacked silicon nanosheet field effect...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2024-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10741537/ |
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| Summary: | We have carried out a detailed study of the impact of oxygen vacancies (O<inline-formula> <tex-math notation="LaTeX">$_{\mathrm {V}}$ </tex-math></inline-formula>), on the performance and the lattice temperature variation in a stacked silicon nanosheet field effect transistor (Si NSFET) through combined first-principles simulations, based on the density functional theory (DFT) and well-calibrated TCAD models. Due to their presence at the interface and in the oxide, OV are the source of reliability concern in the nanoscale devices because of the strong influence on the effective work function (EWF) in the high-<inline-formula> <tex-math notation="LaTeX">$\kappa $ </tex-math></inline-formula>/metal gate stack (HKMG). Employing the DFT simulations, we discuss the variabilities in the EWF and the reliability issues due to OV in the HKMG stack. Further, our TCAD study reveals that due to the inclusion of OV in the gate stack regions, the threshold voltage (V<inline-formula> <tex-math notation="LaTeX">$_{\mathrm {T}}$ </tex-math></inline-formula>), ON current (I<inline-formula> <tex-math notation="LaTeX">$_{\mathrm {ON}}$ </tex-math></inline-formula>), and OFF current (I<inline-formula> <tex-math notation="LaTeX">$_{\mathrm {OFF}}$ </tex-math></inline-formula>) of the Si NSFET are negatively impacted. In addition, due to the poor thermal coupling between the source/channel/drain interfaces and the substrate (heat sink), the ION degrades by nearly 24%. The lattice temperature increases by more than 45 K, when OV are present at Si/SiO2, SiO2/HfO2, and HfO2/TiN interfaces. The statistical variance in VT and ION in the presence of OV is calculated as 0.27 V and <inline-formula> <tex-math notation="LaTeX">$152.23~\mu $ </tex-math></inline-formula>A respectively. Furthermore, the peak electron mobility in the conduction region reduces to 433 cm2V−1s−1 in the presence of OV as compared to 459 cm2V−1s−1 without OV in the gate stack. We believe that our results are essential steps in the quantification and characterization of the reliability of the sub-5 nm transistor technologies. |
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| ISSN: | 2169-3536 |