Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage
This paper proposes new fault-tolerant (FT) space-vector modulation (SVM) techniques for three-level T-type inverter (3L-T2I) to balance neutral-point voltage (NPV) under faulty conditions. Unlike conventional FT-SVM methods, which use three-nearest vectors to synthesize output voltages, the propose...
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IEEE
2025-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10980350/ |
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| author | Duc-Tri do Anh-Tuan Nguyen-Phan Khai M. Nguyen Vinh-Thanh Tran |
| author_facet | Duc-Tri do Anh-Tuan Nguyen-Phan Khai M. Nguyen Vinh-Thanh Tran |
| author_sort | Duc-Tri do |
| collection | DOAJ |
| description | This paper proposes new fault-tolerant (FT) space-vector modulation (SVM) techniques for three-level T-type inverter (3L-T2I) to balance neutral-point voltage (NPV) under faulty conditions. Unlike conventional FT-SVM methods, which use three-nearest vectors to synthesize output voltages, the proposed SVM methods add one small vector to conventional switching sequences to obtain NPV balance. Dwell-time of extra vectors are maximized to decrease NPV balanced time. Comparing to conventional FT-SVM methods, the proposed approaches can significantly reduce the difference in capacitor voltages. As a result, the amplitudes of DC component and high-order harmonics of output currents are also reduced. Consequently, the quality of output current is improved. Experimental results, which are conducted by a 1.1-kVA laboratory prototype, are presented to verify the effectiveness of the proposed FT methods. Comparison studies based on experimental results are also presented to demonstrate the advantages of NPV balance of the proposed method compared to conventional FT methods. |
| format | Article |
| id | doaj-art-a14b8432ef394bd6b85cec3fd14f6d94 |
| institution | Kabale University |
| issn | 2169-3536 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-a14b8432ef394bd6b85cec3fd14f6d942025-08-20T03:52:43ZengIEEEIEEE Access2169-35362025-01-0113780847809610.1109/ACCESS.2025.356585610980350Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point VoltageDuc-Tri do0https://orcid.org/0000-0002-4096-5208Anh-Tuan Nguyen-Phan1https://orcid.org/0009-0001-9504-5871Khai M. Nguyen2https://orcid.org/0009-0005-8586-5808Vinh-Thanh Tran3https://orcid.org/0000-0001-7135-5077Faculty of Electrical and Electronics Engineering, Ho Chi Minh City University of Technology and Education, Ho Chi Minh City, VietnamFaculty of Electrical and Electronics Engineering, Ho Chi Minh City University of Technology and Education, Ho Chi Minh City, VietnamFaculty of Electrical and Electronics Engineering, Ho Chi Minh City University of Technology and Education, Ho Chi Minh City, VietnamFaculty of Electrical and Electronics Engineering, Ho Chi Minh City University of Technology and Education, Ho Chi Minh City, VietnamThis paper proposes new fault-tolerant (FT) space-vector modulation (SVM) techniques for three-level T-type inverter (3L-T2I) to balance neutral-point voltage (NPV) under faulty conditions. Unlike conventional FT-SVM methods, which use three-nearest vectors to synthesize output voltages, the proposed SVM methods add one small vector to conventional switching sequences to obtain NPV balance. Dwell-time of extra vectors are maximized to decrease NPV balanced time. Comparing to conventional FT-SVM methods, the proposed approaches can significantly reduce the difference in capacitor voltages. As a result, the amplitudes of DC component and high-order harmonics of output currents are also reduced. Consequently, the quality of output current is improved. Experimental results, which are conducted by a 1.1-kVA laboratory prototype, are presented to verify the effectiveness of the proposed FT methods. Comparison studies based on experimental results are also presented to demonstrate the advantages of NPV balance of the proposed method compared to conventional FT methods.https://ieeexplore.ieee.org/document/10980350/T-type inverterfault-tolerantneutral-point voltage balancingopen-circuit faultspace-vector modulation |
| spellingShingle | Duc-Tri do Anh-Tuan Nguyen-Phan Khai M. Nguyen Vinh-Thanh Tran Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage IEEE Access T-type inverter fault-tolerant neutral-point voltage balancing open-circuit fault space-vector modulation |
| title | Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage |
| title_full | Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage |
| title_fullStr | Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage |
| title_full_unstemmed | Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage |
| title_short | Fault-Tolerant Methods for Three-Level T-Type Inverter to Balance Neutral-Point Voltage |
| title_sort | fault tolerant methods for three level t type inverter to balance neutral point voltage |
| topic | T-type inverter fault-tolerant neutral-point voltage balancing open-circuit fault space-vector modulation |
| url | https://ieeexplore.ieee.org/document/10980350/ |
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