A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications

A 13.44-Bit Low-Power SAR ADC for Brain–Computer Interface Applications

This paper presents a successive approximation register analog-to-digital converter (SAR ADC) specifically optimized for brain–computer interface (BCI) applications. Designed and post-layout-simulated using 180 nm CMOS technology, the proposed SAR ADC achieves a 13.44-bit effective number of bits (E...

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Bibliographic Details
Main Authors: Hongyuan Yang, Jiahao Cheong, Cheng Liu
Format: Article
Language:English
Published: MDPI AG 2025-05-01
Series:Applied Sciences
Subjects:
BCI
SAR ADC
low power
Online Access:https://www.mdpi.com/2076-3417/15/10/5494
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