Bit-Sliced Implementation of SM4 and New Performance Records
SM4 is a popular block cipher issued by the Office of State Commercial Cryptography Administration (OSCCA) of China. In this paper, we use the bit-slicing technique that has been shown as a powerful strategy to achieve very fast software implementations of SM4. We investigate optimizations on two fr...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2023-01-01
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| Series: | IET Information Security |
| Online Access: | http://dx.doi.org/10.1049/2023/1821499 |
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| _version_ | 1832558545449517056 |
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| author | Xin Miao Lu Li Chun Guo Meiqin Wang Weijia Wang |
| author_facet | Xin Miao Lu Li Chun Guo Meiqin Wang Weijia Wang |
| author_sort | Xin Miao |
| collection | DOAJ |
| description | SM4 is a popular block cipher issued by the Office of State Commercial Cryptography Administration (OSCCA) of China. In this paper, we use the bit-slicing technique that has been shown as a powerful strategy to achieve very fast software implementations of SM4. We investigate optimizations on two frontiers. First, we present a more efficient bit-sliced representation for SM4, which enables running 64 blocks in parallel with 256-bit registers. Second, we describe an optimized algorithm for data form transformations, also allowing efficient implementations of SM4 under Counter (CTR) mode and Galois/Counter mode. The above optimizations contribute to a significant performance gain on one core compared with the state-of-the-art results. This work is an extension of the conference paper at Inscrypt 2022, awarded the best paper award. |
| format | Article |
| id | doaj-art-9b32c6e884b84deeb84dace7ca88df46 |
| institution | Kabale University |
| issn | 1751-8717 |
| language | English |
| publishDate | 2023-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | IET Information Security |
| spelling | doaj-art-9b32c6e884b84deeb84dace7ca88df462025-02-03T01:32:08ZengWileyIET Information Security1751-87172023-01-01202310.1049/2023/1821499Bit-Sliced Implementation of SM4 and New Performance RecordsXin Miao0Lu Li1Chun Guo2Meiqin Wang3Weijia Wang4School of Cyber Science and TechnologySchool of Cyber Science and TechnologySchool of Cyber Science and TechnologySchool of Cyber Science and TechnologySchool of Cyber Science and TechnologySM4 is a popular block cipher issued by the Office of State Commercial Cryptography Administration (OSCCA) of China. In this paper, we use the bit-slicing technique that has been shown as a powerful strategy to achieve very fast software implementations of SM4. We investigate optimizations on two frontiers. First, we present a more efficient bit-sliced representation for SM4, which enables running 64 blocks in parallel with 256-bit registers. Second, we describe an optimized algorithm for data form transformations, also allowing efficient implementations of SM4 under Counter (CTR) mode and Galois/Counter mode. The above optimizations contribute to a significant performance gain on one core compared with the state-of-the-art results. This work is an extension of the conference paper at Inscrypt 2022, awarded the best paper award.http://dx.doi.org/10.1049/2023/1821499 |
| spellingShingle | Xin Miao Lu Li Chun Guo Meiqin Wang Weijia Wang Bit-Sliced Implementation of SM4 and New Performance Records IET Information Security |
| title | Bit-Sliced Implementation of SM4 and New Performance Records |
| title_full | Bit-Sliced Implementation of SM4 and New Performance Records |
| title_fullStr | Bit-Sliced Implementation of SM4 and New Performance Records |
| title_full_unstemmed | Bit-Sliced Implementation of SM4 and New Performance Records |
| title_short | Bit-Sliced Implementation of SM4 and New Performance Records |
| title_sort | bit sliced implementation of sm4 and new performance records |
| url | http://dx.doi.org/10.1049/2023/1821499 |
| work_keys_str_mv | AT xinmiao bitslicedimplementationofsm4andnewperformancerecords AT luli bitslicedimplementationofsm4andnewperformancerecords AT chunguo bitslicedimplementationofsm4andnewperformancerecords AT meiqinwang bitslicedimplementationofsm4andnewperformancerecords AT weijiawang bitslicedimplementationofsm4andnewperformancerecords |