Potential and Quantum Threshold Voltage Modeling of Gate-All-Around Nanowire MOSFETs
An improved physics-based compact model for a symmetrically biased gate-all-around (GAA) silicon nanowire transistor is proposed. Short channel effects and quantum mechanical effects caused by the ultrathin silicon devices are considered in modelling the threshold voltage. Device geometrics play a v...
Saved in:
| Main Authors: | M. Karthigai Pandian, N. B. Balamurugan, A. Pricilla |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2013-01-01
|
| Series: | Active and Passive Electronic Components |
| Online Access: | http://dx.doi.org/10.1155/2013/153157 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Effect of Grain Size on the Threshold Voltage for Double-Gate Polycrystaline Silicon MOSFET
by: Alka Panwar, et al.
Published: (2011-01-01) -
Threshold voltage instability of SiC MOSFETs under very‐high temperature and wide gate bias
by: Cong Chen, et al.
Published: (2024-11-01) -
A 2-D Analytical Threshold Voltage Model for Symmetric Double Gate MOSFET's Using Green’s Function
by: Anoop Garg, et al.
Published: (2011-01-01) -
Modeling of Surface Potential and Threshold Voltage of LDD nMOSFET's with Localized Defects
by: A. Bouhdada, et al.
Published: (2000-01-01) -
Simulation and Finite Element Analysis of Electrical Characteristics of Gate-all-Around Junctionless Nanowire Transistors
by: Neel Chatterjee, et al.
Published: (2016-03-01)