Evaluation system of high-speed anolog to digital converter based on FPGA

Evaluation system of high-speed anolog to digital converter based on FPGA

A　high speed anolog to digital converter (ADC) evaluation system based on field programmable logic array (FPGA) is designed and implemented. The logic codes are designed based on the FPGA, and the signal sampling and data transmission of ADC are controlled according to different test modes. The anal...

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Bibliographic Details
Main Authors: Chen Minqi, Deng Lanqing, Yang Linyun
Format: Article
Language:zho
Published: National Computer System Engineering Research Institute of China 2024-02-01
Series:Dianzi Jishu Yingyong
Subjects:
fpga
adc
upper computer
matlab
ethernet
Online Access:http://www.chinaaet.com/article/3000163486
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