Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling
We have modeled a memory system using Josephson Junction to attain low power consumption using low input voltage compared to conventional Complementary Metal Oxide Semiconductor-Static Random Access Memory (CMOS-SRAM). We attained the low power by connecting a shared/common bit line and using a 1-bi...
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| Format: | Article |
| Language: | English |
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Wiley
2018-01-01
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| Series: | Advances in Condensed Matter Physics |
| Online Access: | http://dx.doi.org/10.1155/2018/2683723 |
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| author | S. Narendran J. Selvakumar |
| author_facet | S. Narendran J. Selvakumar |
| author_sort | S. Narendran |
| collection | DOAJ |
| description | We have modeled a memory system using Josephson Junction to attain low power consumption using low input voltage compared to conventional Complementary Metal Oxide Semiconductor-Static Random Access Memory (CMOS-SRAM). We attained the low power by connecting a shared/common bit line and using a 1-bit memory cell. Through our design we may attain 2.5–3.5 microwatts of power using lower input voltage of 0.6 millivolts. Comparative study has been made to find which memory system will attain low power consumption. Conventional SRAM techniques consume power in the range of milliwatts with the supply input in the range of 0-10 volts. Using HDL language, we made a memory logic design of RAM cells using Josephson Junction in FreeHDL software which is dedicated only for Josephson Junction based design. With use of XILINX, we have calculated the power consumption and equivalent Register Transfer Level (RTL) schematic is drawn. |
| format | Article |
| id | doaj-art-98886428efa7403193a15c7d8ea3199b |
| institution | Kabale University |
| issn | 1687-8108 1687-8124 |
| language | English |
| publishDate | 2018-01-01 |
| publisher | Wiley |
| record_format | Article |
| series | Advances in Condensed Matter Physics |
| spelling | doaj-art-98886428efa7403193a15c7d8ea3199b2025-02-03T01:21:54ZengWileyAdvances in Condensed Matter Physics1687-81081687-81242018-01-01201810.1155/2018/26837232683723Digital Simulation of Superconductive Memory System Based on Hardware Description Language ModelingS. Narendran0J. Selvakumar1Department of Electronics & Communication Engineering, SRM Institute of Science and Technology, Chennai, IndiaDepartment of Electronics & Communication Engineering, SRM Institute of Science and Technology, Chennai, IndiaWe have modeled a memory system using Josephson Junction to attain low power consumption using low input voltage compared to conventional Complementary Metal Oxide Semiconductor-Static Random Access Memory (CMOS-SRAM). We attained the low power by connecting a shared/common bit line and using a 1-bit memory cell. Through our design we may attain 2.5–3.5 microwatts of power using lower input voltage of 0.6 millivolts. Comparative study has been made to find which memory system will attain low power consumption. Conventional SRAM techniques consume power in the range of milliwatts with the supply input in the range of 0-10 volts. Using HDL language, we made a memory logic design of RAM cells using Josephson Junction in FreeHDL software which is dedicated only for Josephson Junction based design. With use of XILINX, we have calculated the power consumption and equivalent Register Transfer Level (RTL) schematic is drawn.http://dx.doi.org/10.1155/2018/2683723 |
| spellingShingle | S. Narendran J. Selvakumar Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling Advances in Condensed Matter Physics |
| title | Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling |
| title_full | Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling |
| title_fullStr | Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling |
| title_full_unstemmed | Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling |
| title_short | Digital Simulation of Superconductive Memory System Based on Hardware Description Language Modeling |
| title_sort | digital simulation of superconductive memory system based on hardware description language modeling |
| url | http://dx.doi.org/10.1155/2018/2683723 |
| work_keys_str_mv | AT snarendran digitalsimulationofsuperconductivememorysystembasedonhardwaredescriptionlanguagemodeling AT jselvakumar digitalsimulationofsuperconductivememorysystembasedonhardwaredescriptionlanguagemodeling |