APA (7th ed.) Citation

Jaquenod, G. A., Valls, J., & Siman, J. Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain. Wiley.

Chicago Style (17th ed.) Citation

Jaquenod, Guillermo A., Javier Valls, and Javier Siman. Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain. Wiley.

MLA (9th ed.) Citation

Jaquenod, Guillermo A., et al. Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain. Wiley.