Design of Approximate Adder With Reconfigurable Accuracy
Arithmetic circuits such as adders are fundamental components in implementing image processing applications. Since these applications are error-tolerant, the adders can be approximated to improve their PDP (Power-Delay-Product) metric while maintaining accuracy within tolerance limits. This paper pr...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2025-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10847823/ |
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