Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array

As for the problem of hardware task crossing-level data transmission,a preorder traversing backtracking adding_bypass_node (PTBA) algorithm is presented which maintains logic relation among original computing nodes and does not add redundancy nodes based on data flow graph with crossing-level-in-tre...

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Main Authors: Nai-jin CHEN, Zhi-yong FENG, Jian-hui JIANG
Format: Article
Language:zho
Published: Editorial Department of Journal on Communications 2015-04-01
Series:Tongxin xuebao
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Online Access:http://www.joconline.com.cn/zh/article/doi/10.11959/j.issn.1000-436x.2015132/
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author Nai-jin CHEN
Zhi-yong FENG
Jian-hui JIANG
author_facet Nai-jin CHEN
Zhi-yong FENG
Jian-hui JIANG
author_sort Nai-jin CHEN
collection DOAJ
description As for the problem of hardware task crossing-level data transmission,a preorder traversing backtracking adding_bypass_node (PTBA) algorithm is presented which maintains logic relation among original computing nodes and does not add redundancy nodes based on data flow graph with crossing-level-in-tree(CLIT) and crossing-level-out-tree (CLOT).The pipelined model of partitioning mapping and the quantitative evaluation indexes are presented for the dynamic reconfigurable system.The critical condition of PTBA mapping is proposed.Compared with preorder traversing backtracking no adding_bypass_node (PTBNA) mapping,and under the premise of critical condition,experimental results show PTBA mapping can improve the number of modules,the number of non-original input times and non-original output times,the total execution delay and powers of all partitioning based on the same system architecture and partitioning mapping algorithm.The proposed algorithm obtains the less average execution total cycles by 23.3%(RCA<sub>5×5</sub>),30.5%(RCA<sub>8×8</sub>),and the less average power consumption by 15.7%(RCA<sub>5×5</sub>),18.6%(RCA<sub>8×8</sub>) than previous advanced split-push kernel mapping(SPKM).PTBA has rationality and effectiveness.
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institution Kabale University
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publisher Editorial Department of Journal on Communications
record_format Article
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spelling doaj-art-8fe81b8e8f0644a48a083923d067664e2025-01-14T06:46:06ZzhoEditorial Department of Journal on CommunicationsTongxin xuebao1000-436X2015-04-0136355159692122Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell arrayNai-jin CHENZhi-yong FENGJian-hui JIANGAs for the problem of hardware task crossing-level data transmission,a preorder traversing backtracking adding_bypass_node (PTBA) algorithm is presented which maintains logic relation among original computing nodes and does not add redundancy nodes based on data flow graph with crossing-level-in-tree(CLIT) and crossing-level-out-tree (CLOT).The pipelined model of partitioning mapping and the quantitative evaluation indexes are presented for the dynamic reconfigurable system.The critical condition of PTBA mapping is proposed.Compared with preorder traversing backtracking no adding_bypass_node (PTBNA) mapping,and under the premise of critical condition,experimental results show PTBA mapping can improve the number of modules,the number of non-original input times and non-original output times,the total execution delay and powers of all partitioning based on the same system architecture and partitioning mapping algorithm.The proposed algorithm obtains the less average execution total cycles by 23.3%(RCA<sub>5×5</sub>),30.5%(RCA<sub>8×8</sub>),and the less average power consumption by 15.7%(RCA<sub>5×5</sub>),18.6%(RCA<sub>8×8</sub>) than previous advanced split-push kernel mapping(SPKM).PTBA has rationality and effectiveness.http://www.joconline.com.cn/zh/article/doi/10.11959/j.issn.1000-436x.2015132/RCAdata flow graphbypass nodecritical conditiontemporal partitioning and mapping
spellingShingle Nai-jin CHEN
Zhi-yong FENG
Jian-hui JIANG
Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array
Tongxin xuebao
RCA
data flow graph
bypass node
critical condition
temporal partitioning and mapping
title Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array
title_full Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array
title_fullStr Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array
title_full_unstemmed Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array
title_short Bypass node non-redundant adding algorithm for crossing-level data transmission in two-dimension reconfigurable cell array
title_sort bypass node non redundant adding algorithm for crossing level data transmission in two dimension reconfigurable cell array
topic RCA
data flow graph
bypass node
critical condition
temporal partitioning and mapping
url http://www.joconline.com.cn/zh/article/doi/10.11959/j.issn.1000-436x.2015132/
work_keys_str_mv AT naijinchen bypassnodenonredundantaddingalgorithmforcrossingleveldatatransmissionintwodimensionreconfigurablecellarray
AT zhiyongfeng bypassnodenonredundantaddingalgorithmforcrossingleveldatatransmissionintwodimensionreconfigurablecellarray
AT jianhuijiang bypassnodenonredundantaddingalgorithmforcrossingleveldatatransmissionintwodimensionreconfigurablecellarray