A novel low complexity, low latency rate 1/2 FEC code
In this paper, a relatively simple and low complexity rate 1/2 FEC (Forward Error Correction) code has been proposed. The proposed encoder combines the effect of the low cross correlation of two orthogonal sequences along with the effect of the quadrature phase to achieve the desired performance. A...
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| Format: | Article |
| Language: | English |
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Elsevier
2024-12-01
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| Series: | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
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| Online Access: | http://www.sciencedirect.com/science/article/pii/S2772671124004182 |
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| author | Maan A.S. Al-Adwany Mohammed H. Al-Jammas Hind Th. Hamdoon |
| author_facet | Maan A.S. Al-Adwany Mohammed H. Al-Jammas Hind Th. Hamdoon |
| author_sort | Maan A.S. Al-Adwany |
| collection | DOAJ |
| description | In this paper, a relatively simple and low complexity rate 1/2 FEC (Forward Error Correction) code has been proposed. The proposed encoder combines the effect of the low cross correlation of two orthogonal sequences along with the effect of the quadrature phase to achieve the desired performance. A mathematical modeling for the proposed code has been accomplished which indicates that the code is able to deliver a 3dB coding gain. The obtained results revealed that the performance of the proposed code is comparable to that of the Convolutional Codes (CCs). Interestingly, the latency analysis showed that, unlike polar codes and convolutional codes where latency is correlated with the data block size or traceback depth (TB), the proposed code exhibits a decoding latency of a single clock cycle. Furthermore, the proposed code and the CC have been implemented on an Field Programmable Gate Array (FPGA) platform to evaluate the overhead in terms of usability of hardware resources. The experimental results showed that the proposed code can achieve a 3dB coding gain, which is in agreement with the outcomes of the mathematical analyses. Moreover, the proposed code showed relatively fewer usability of hardware resources. Accordingly, the proposed code is suitable for applications that require a good balance between error correction and data rate. |
| format | Article |
| id | doaj-art-8a18ecf77e3847a2ba94d66156fe1e44 |
| institution | OA Journals |
| issn | 2772-6711 |
| language | English |
| publishDate | 2024-12-01 |
| publisher | Elsevier |
| record_format | Article |
| series | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
| spelling | doaj-art-8a18ecf77e3847a2ba94d66156fe1e442025-08-20T02:35:43ZengElseviere-Prime: Advances in Electrical Engineering, Electronics and Energy2772-67112024-12-011010083810.1016/j.prime.2024.100838A novel low complexity, low latency rate 1/2 FEC codeMaan A.S. Al-Adwany0Mohammed H. Al-Jammas1Hind Th. Hamdoon2Ninevah University, Computer and Information Engineering Department, Mosul, Nineveh, IraqCorresponding author.; Ninevah University, Computer and Information Engineering Department, Mosul, Nineveh, IraqNinevah University, Computer and Information Engineering Department, Mosul, Nineveh, IraqIn this paper, a relatively simple and low complexity rate 1/2 FEC (Forward Error Correction) code has been proposed. The proposed encoder combines the effect of the low cross correlation of two orthogonal sequences along with the effect of the quadrature phase to achieve the desired performance. A mathematical modeling for the proposed code has been accomplished which indicates that the code is able to deliver a 3dB coding gain. The obtained results revealed that the performance of the proposed code is comparable to that of the Convolutional Codes (CCs). Interestingly, the latency analysis showed that, unlike polar codes and convolutional codes where latency is correlated with the data block size or traceback depth (TB), the proposed code exhibits a decoding latency of a single clock cycle. Furthermore, the proposed code and the CC have been implemented on an Field Programmable Gate Array (FPGA) platform to evaluate the overhead in terms of usability of hardware resources. The experimental results showed that the proposed code can achieve a 3dB coding gain, which is in agreement with the outcomes of the mathematical analyses. Moreover, the proposed code showed relatively fewer usability of hardware resources. Accordingly, the proposed code is suitable for applications that require a good balance between error correction and data rate.http://www.sciencedirect.com/science/article/pii/S2772671124004182Channel codingForward error correction codes5G wireless communicationViterbi decoder |
| spellingShingle | Maan A.S. Al-Adwany Mohammed H. Al-Jammas Hind Th. Hamdoon A novel low complexity, low latency rate 1/2 FEC code e-Prime: Advances in Electrical Engineering, Electronics and Energy Channel coding Forward error correction codes 5G wireless communication Viterbi decoder |
| title | A novel low complexity, low latency rate 1/2 FEC code |
| title_full | A novel low complexity, low latency rate 1/2 FEC code |
| title_fullStr | A novel low complexity, low latency rate 1/2 FEC code |
| title_full_unstemmed | A novel low complexity, low latency rate 1/2 FEC code |
| title_short | A novel low complexity, low latency rate 1/2 FEC code |
| title_sort | novel low complexity low latency rate 1 2 fec code |
| topic | Channel coding Forward error correction codes 5G wireless communication Viterbi decoder |
| url | http://www.sciencedirect.com/science/article/pii/S2772671124004182 |
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