Design of a low-delay 4-bit parallel prefix adder using QCA technology

Design of a low-delay 4-bit parallel prefix adder using QCA technology

Abstract This paper presents a novel low-delay 4-bit Parallel Prefix Adder (PPA) implemented as a multilayer circuit using Quantum Dot Cellular Automata (QCA) technology. PPAs are among the most suitable architectures for high-speed digital design, offering significant advantages in scalability and...

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Bibliographic Details
Main Authors: Tushar Niranjan, Anirban Nayak, Sreehari Veeramachaneni, Syed Ershad Ahmed
Format: Article
Language:English
Published: Nature Portfolio 2025-07-01
Series:Scientific Reports
Subjects:
Parallel prefix adder
QCA
VLSI
Online Access:https://doi.org/10.1038/s41598-025-04742-6
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