Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers
High-precision, low-power MEMS accelerometers are extensively utilized across civilian applications. Closed-loop accelerometers employing switched-capacitor (SC) circuit topologies offer notable advantages, including low power consumption, high signal-to-noise ratio (SNR), and excellent linearity. A...
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MDPI AG
2025-01-01
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| author | Juncheng Cai Yongbin Cai Xiangyu Li Shanshan Wang Xiaowei Zhang Xinpeng Di Pengjun Wang |
| author_facet | Juncheng Cai Yongbin Cai Xiangyu Li Shanshan Wang Xiaowei Zhang Xinpeng Di Pengjun Wang |
| author_sort | Juncheng Cai |
| collection | DOAJ |
| description | High-precision, low-power MEMS accelerometers are extensively utilized across civilian applications. Closed-loop accelerometers employing switched-capacitor (SC) circuit topologies offer notable advantages, including low power consumption, high signal-to-noise ratio (SNR), and excellent linearity. Addressing the critical demand for high-precision, low-power MEMS accelerometers in modern geophones, this work focuses on the design and implementation of closed-loop interface ASICs (Application-Specific Integrated Circuits). The proposed interface circuit, based on switched-capacitor modulation technology, incorporates a low-noise charge amplifier, sample-and-hold circuit, integrator, and clock divider circuit. To minimize average power consumption, a switched operational amplifier (op-amp) technique is adopted, which temporarily disconnects idle op-amps from the power supply. Additionally, a class-AB output stage is employed to enhance the dynamic range of the circuit. The design was realized using a standard 0.35 μm CMOS process, culminating in the completion of layout design and small-scale engineering fabrication. The performance of the MEMS accelerometers was evaluated under a 3.3 V power supply, achieving a power consumption of 3.3 mW, an accelerometer noise density below 1 μg/√Hz, a sensitivity of 1.65 V/g, a measurement range of ±1 g, a nonlinearity of 0.15%, a bandwidth of 300 Hz, and a bias stability of approximately 36 μg. These results demonstrate the efficacy of the proposed design in meeting the stringent requirements of high-precision MEMS accelerometer applications. |
| format | Article |
| id | doaj-art-83583dd36b8e4279997d6f7bdcd9048b |
| institution | Kabale University |
| issn | 2072-666X |
| language | English |
| publishDate | 2025-01-01 |
| publisher | MDPI AG |
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| series | Micromachines |
| spelling | doaj-art-83583dd36b8e4279997d6f7bdcd9048b2025-01-24T13:42:08ZengMDPI AGMicromachines2072-666X2025-01-011619610.3390/mi16010096Design of Interface ASIC with Power-Saving Switches for Capacitive AccelerometersJuncheng Cai0Yongbin Cai1Xiangyu Li2Shanshan Wang3Xiaowei Zhang4Xinpeng Di5Pengjun Wang6Hangzhou Sotry Automatic Control Tech Co., Ltd., Hangzhou 311112, ChinaHangzhou Sotry Automatic Control Tech Co., Ltd., Hangzhou 311112, ChinaCollege of Electrical and Electronic Engineering, Wenzhou University, Wenzhou 325035, ChinaFaculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo 315211, ChinaFaculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo 315211, ChinaShanghai Aerospace Control Technology Institute, Shanghai 201109, ChinaCollege of Electrical and Electronic Engineering, Wenzhou University, Wenzhou 325035, ChinaHigh-precision, low-power MEMS accelerometers are extensively utilized across civilian applications. Closed-loop accelerometers employing switched-capacitor (SC) circuit topologies offer notable advantages, including low power consumption, high signal-to-noise ratio (SNR), and excellent linearity. Addressing the critical demand for high-precision, low-power MEMS accelerometers in modern geophones, this work focuses on the design and implementation of closed-loop interface ASICs (Application-Specific Integrated Circuits). The proposed interface circuit, based on switched-capacitor modulation technology, incorporates a low-noise charge amplifier, sample-and-hold circuit, integrator, and clock divider circuit. To minimize average power consumption, a switched operational amplifier (op-amp) technique is adopted, which temporarily disconnects idle op-amps from the power supply. Additionally, a class-AB output stage is employed to enhance the dynamic range of the circuit. The design was realized using a standard 0.35 μm CMOS process, culminating in the completion of layout design and small-scale engineering fabrication. The performance of the MEMS accelerometers was evaluated under a 3.3 V power supply, achieving a power consumption of 3.3 mW, an accelerometer noise density below 1 μg/√Hz, a sensitivity of 1.65 V/g, a measurement range of ±1 g, a nonlinearity of 0.15%, a bandwidth of 300 Hz, and a bias stability of approximately 36 μg. These results demonstrate the efficacy of the proposed design in meeting the stringent requirements of high-precision MEMS accelerometer applications.https://www.mdpi.com/2072-666X/16/1/96MEMS accelerometersintegrated circuitshigh-precision |
| spellingShingle | Juncheng Cai Yongbin Cai Xiangyu Li Shanshan Wang Xiaowei Zhang Xinpeng Di Pengjun Wang Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers Micromachines MEMS accelerometers integrated circuits high-precision |
| title | Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers |
| title_full | Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers |
| title_fullStr | Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers |
| title_full_unstemmed | Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers |
| title_short | Design of Interface ASIC with Power-Saving Switches for Capacitive Accelerometers |
| title_sort | design of interface asic with power saving switches for capacitive accelerometers |
| topic | MEMS accelerometers integrated circuits high-precision |
| url | https://www.mdpi.com/2072-666X/16/1/96 |
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