A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter
Abstract Key parameters of analog‐to‐digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The dynamic range of an ADC also plays an important rol...
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Format: | Article |
Language: | English |
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Wiley
2023-07-01
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Series: | IET Circuits, Devices and Systems |
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Online Access: | https://doi.org/10.1049/cds2.12156 |
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author | Satish Mulleti Eliya Reznitskiy Shlomi Savariego Moshe Namer Nimrod Glazer Yonina C. Eldar |
author_facet | Satish Mulleti Eliya Reznitskiy Shlomi Savariego Moshe Namer Nimrod Glazer Yonina C. Eldar |
author_sort | Satish Mulleti |
collection | DOAJ |
description | Abstract Key parameters of analog‐to‐digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The dynamic range of an ADC also plays an important role, and ideally, it should be greater than the signal's; otherwise, the signal will be clipped. To avoid clipping, modulo folding can be used before sampling, followed by an unfolding algorithm to recover the true signal. Here, the authors present a modulo hardware prototype that can be used before sampling to avoid clipping. The authors’ modulo hardware operates prior to the sampling mechanism and can fold higher frequency signals compared to existing hardware. The authors present a detailed design of the hardware and also address key issues that arise during implementation. In terms of applications, the authors show the reconstruction of finite‐rate‐of‐innovation signals, which are beyond the dynamic range of the ADC. The authors’ system operates at six times below the Nyquist rate of the signal and can accommodate eight times larger signals than the ADC's dynamic range. |
format | Article |
id | doaj-art-75d5185420af47229ac7b9c921b592c9 |
institution | Kabale University |
issn | 1751-858X 1751-8598 |
language | English |
publishDate | 2023-07-01 |
publisher | Wiley |
record_format | Article |
series | IET Circuits, Devices and Systems |
spelling | doaj-art-75d5185420af47229ac7b9c921b592c92025-02-03T06:45:05ZengWileyIET Circuits, Devices and Systems1751-858X1751-85982023-07-0117418119210.1049/cds2.12156A hardware prototype of wideband high‐dynamic range analog‐to‐digital converterSatish Mulleti0Eliya Reznitskiy1Shlomi Savariego2Moshe Namer3Nimrod Glazer4Yonina C. Eldar5Department of Electrical Engineering Indian Institute of Technology (IIT) Bombay Mumbai IndiaFaculty of Math and Computer Science Weizmann Institute of Science Rehovot IsraelFaculty of Math and Computer Science Weizmann Institute of Science Rehovot IsraelFaculty of Math and Computer Science Weizmann Institute of Science Rehovot IsraelFaculty of Math and Computer Science Weizmann Institute of Science Rehovot IsraelFaculty of Math and Computer Science Weizmann Institute of Science Rehovot IsraelAbstract Key parameters of analog‐to‐digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The dynamic range of an ADC also plays an important role, and ideally, it should be greater than the signal's; otherwise, the signal will be clipped. To avoid clipping, modulo folding can be used before sampling, followed by an unfolding algorithm to recover the true signal. Here, the authors present a modulo hardware prototype that can be used before sampling to avoid clipping. The authors’ modulo hardware operates prior to the sampling mechanism and can fold higher frequency signals compared to existing hardware. The authors present a detailed design of the hardware and also address key issues that arise during implementation. In terms of applications, the authors show the reconstruction of finite‐rate‐of‐innovation signals, which are beyond the dynamic range of the ADC. The authors’ system operates at six times below the Nyquist rate of the signal and can accommodate eight times larger signals than the ADC's dynamic range.https://doi.org/10.1049/cds2.12156analog‐to‐digital conversionautomatic gain controlsample and hold circuitssampling methodssignal reconstructionsignal sampling |
spellingShingle | Satish Mulleti Eliya Reznitskiy Shlomi Savariego Moshe Namer Nimrod Glazer Yonina C. Eldar A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter IET Circuits, Devices and Systems analog‐to‐digital conversion automatic gain control sample and hold circuits sampling methods signal reconstruction signal sampling |
title | A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter |
title_full | A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter |
title_fullStr | A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter |
title_full_unstemmed | A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter |
title_short | A hardware prototype of wideband high‐dynamic range analog‐to‐digital converter |
title_sort | hardware prototype of wideband high dynamic range analog to digital converter |
topic | analog‐to‐digital conversion automatic gain control sample and hold circuits sampling methods signal reconstruction signal sampling |
url | https://doi.org/10.1049/cds2.12156 |
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