An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect
Abstract The phenomenon of ferroelectric imprint, characterized by an asymmetric polarization switching behavior, poses significant challenges in the reliability and performance of ultra‐low‐voltage ferroelectric devices, including MagnetoElectric Spin‐Orbit devices, Ferroelectric Random‐Access Memo...
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| Format: | Article |
| Language: | English |
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Wiley
2025-08-01
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| Series: | Advanced Science |
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| Online Access: | https://doi.org/10.1002/advs.70011 |
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| author | Yu‐Wei Chen Tung‐Yuan Yu Chun‐Wei Huang Tzu‐Hsuan Yu Yung‐Chi Su Chao‐Rung Chen Wei‐Chen Hung Pei‐Yin Chang Bhagwati Prasad Yu‐Chuan Lin Ramamoorthy Ramesh Yen‐Lin Huang |
| author_facet | Yu‐Wei Chen Tung‐Yuan Yu Chun‐Wei Huang Tzu‐Hsuan Yu Yung‐Chi Su Chao‐Rung Chen Wei‐Chen Hung Pei‐Yin Chang Bhagwati Prasad Yu‐Chuan Lin Ramamoorthy Ramesh Yen‐Lin Huang |
| author_sort | Yu‐Wei Chen |
| collection | DOAJ |
| description | Abstract The phenomenon of ferroelectric imprint, characterized by an asymmetric polarization switching behavior, poses significant challenges in the reliability and performance of ultra‐low‐voltage ferroelectric devices, including MagnetoElectric Spin‐Orbit devices, Ferroelectric Random‐Access Memory, Ferroelectric Field‐Effect Transistors, and Ferroelectric Tunnel Junctions. In this study, the influence of electrode configuration in different device architectures are systematically investigated on their imprint effect. By tuning the work function of La0.7Sr0.3MnO3 (LSMO) electrodes through oxygen pressure during deposition, precise control over the built‐in voltage offset (Voffset) in ferroelectric capacitors are demonstrated. This results reveal that higher oxygen pressures increase the work function of LSMO, effectively compensating for Voffset and enhancing device stability. Finally, a ferroelectric device with a hybrid bottom electrode of LSMO and SrRuO3 is optimized to mitigate the imprint effect. The optimal device showcases small coercive voltage of 0.3 V, a minimal Voffset of 0.06 V, excellent endurance (electrical cycle up to 109), and robust zero bias applied polarization retention. These findings provide a practical guideline for electrode design in ferroelectric devices, addressing the imprint effect and improving operational reliability. This approach, combining material tuning and in situ diagnostics, offers a pathway to optimize ferroelectric device performance, with implications for advancing ultra‐low‐power electronics. |
| format | Article |
| id | doaj-art-753eb8604c2a408f8a836b1684e2f79f |
| institution | Kabale University |
| issn | 2198-3844 |
| language | English |
| publishDate | 2025-08-01 |
| publisher | Wiley |
| record_format | Article |
| series | Advanced Science |
| spelling | doaj-art-753eb8604c2a408f8a836b1684e2f79f2025-08-20T03:41:08ZengWileyAdvanced Science2198-38442025-08-011229n/an/a10.1002/advs.70011An Electrode Design Strategy to Minimize Ferroelectric Imprint EffectYu‐Wei Chen0Tung‐Yuan Yu1Chun‐Wei Huang2Tzu‐Hsuan Yu3Yung‐Chi Su4Chao‐Rung Chen5Wei‐Chen Hung6Pei‐Yin Chang7Bhagwati Prasad8Yu‐Chuan Lin9Ramamoorthy Ramesh10Yen‐Lin Huang11Department of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanTaiwan Semiconductor Research Institute Hsinchu 300091 TaiwanDepartment of Materials Science and Engineering Feng Chia University Taichung 407102 TaiwanDepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanDepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanDepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanDepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanDepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanDepartment of Materials Engineering Indian Institute of Science Bangalore Karnataka 560012 IndiaDepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanDepartment of Materials Science and Engineering Rice University Texas 77005 USADepartment of Materials Science and Engineering National Yang Ming Chiao Tung University Hsinchu 300093 TaiwanAbstract The phenomenon of ferroelectric imprint, characterized by an asymmetric polarization switching behavior, poses significant challenges in the reliability and performance of ultra‐low‐voltage ferroelectric devices, including MagnetoElectric Spin‐Orbit devices, Ferroelectric Random‐Access Memory, Ferroelectric Field‐Effect Transistors, and Ferroelectric Tunnel Junctions. In this study, the influence of electrode configuration in different device architectures are systematically investigated on their imprint effect. By tuning the work function of La0.7Sr0.3MnO3 (LSMO) electrodes through oxygen pressure during deposition, precise control over the built‐in voltage offset (Voffset) in ferroelectric capacitors are demonstrated. This results reveal that higher oxygen pressures increase the work function of LSMO, effectively compensating for Voffset and enhancing device stability. Finally, a ferroelectric device with a hybrid bottom electrode of LSMO and SrRuO3 is optimized to mitigate the imprint effect. The optimal device showcases small coercive voltage of 0.3 V, a minimal Voffset of 0.06 V, excellent endurance (electrical cycle up to 109), and robust zero bias applied polarization retention. These findings provide a practical guideline for electrode design in ferroelectric devices, addressing the imprint effect and improving operational reliability. This approach, combining material tuning and in situ diagnostics, offers a pathway to optimize ferroelectric device performance, with implications for advancing ultra‐low‐power electronics.https://doi.org/10.1002/advs.70011Ferroelectricsimprintreliabilityretentionultra‐low‐voltage |
| spellingShingle | Yu‐Wei Chen Tung‐Yuan Yu Chun‐Wei Huang Tzu‐Hsuan Yu Yung‐Chi Su Chao‐Rung Chen Wei‐Chen Hung Pei‐Yin Chang Bhagwati Prasad Yu‐Chuan Lin Ramamoorthy Ramesh Yen‐Lin Huang An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect Advanced Science Ferroelectrics imprint reliability retention ultra‐low‐voltage |
| title | An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect |
| title_full | An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect |
| title_fullStr | An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect |
| title_full_unstemmed | An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect |
| title_short | An Electrode Design Strategy to Minimize Ferroelectric Imprint Effect |
| title_sort | electrode design strategy to minimize ferroelectric imprint effect |
| topic | Ferroelectrics imprint reliability retention ultra‐low‐voltage |
| url | https://doi.org/10.1002/advs.70011 |
| work_keys_str_mv | AT yuweichen anelectrodedesignstrategytominimizeferroelectricimprinteffect AT tungyuanyu anelectrodedesignstrategytominimizeferroelectricimprinteffect AT chunweihuang anelectrodedesignstrategytominimizeferroelectricimprinteffect AT tzuhsuanyu anelectrodedesignstrategytominimizeferroelectricimprinteffect AT yungchisu anelectrodedesignstrategytominimizeferroelectricimprinteffect AT chaorungchen anelectrodedesignstrategytominimizeferroelectricimprinteffect AT weichenhung anelectrodedesignstrategytominimizeferroelectricimprinteffect AT peiyinchang anelectrodedesignstrategytominimizeferroelectricimprinteffect AT bhagwatiprasad anelectrodedesignstrategytominimizeferroelectricimprinteffect AT yuchuanlin anelectrodedesignstrategytominimizeferroelectricimprinteffect AT ramamoorthyramesh anelectrodedesignstrategytominimizeferroelectricimprinteffect AT yenlinhuang anelectrodedesignstrategytominimizeferroelectricimprinteffect AT yuweichen electrodedesignstrategytominimizeferroelectricimprinteffect AT tungyuanyu electrodedesignstrategytominimizeferroelectricimprinteffect AT chunweihuang electrodedesignstrategytominimizeferroelectricimprinteffect AT tzuhsuanyu electrodedesignstrategytominimizeferroelectricimprinteffect AT yungchisu electrodedesignstrategytominimizeferroelectricimprinteffect AT chaorungchen electrodedesignstrategytominimizeferroelectricimprinteffect AT weichenhung electrodedesignstrategytominimizeferroelectricimprinteffect AT peiyinchang electrodedesignstrategytominimizeferroelectricimprinteffect AT bhagwatiprasad electrodedesignstrategytominimizeferroelectricimprinteffect AT yuchuanlin electrodedesignstrategytominimizeferroelectricimprinteffect AT ramamoorthyramesh electrodedesignstrategytominimizeferroelectricimprinteffect AT yenlinhuang electrodedesignstrategytominimizeferroelectricimprinteffect |