LDPC-cat codes for low-overhead quantum computing in 2D
Abstract The main obstacle to large scale quantum computing are the errors present in every physical qubit realization. Correcting these errors requires a large number of additional qubits. Two main avenues to reduce this overhead are (i) low-density parity check (LDPC) codes requiring very few addi...
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| Format: | Article |
| Language: | English |
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Nature Portfolio
2025-01-01
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| Series: | Nature Communications |
| Online Access: | https://doi.org/10.1038/s41467-025-56298-8 |
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| author | Diego Ruiz Jérémie Guillaud Anthony Leverrier Mazyar Mirrahimi Christophe Vuillot |
| author_facet | Diego Ruiz Jérémie Guillaud Anthony Leverrier Mazyar Mirrahimi Christophe Vuillot |
| author_sort | Diego Ruiz |
| collection | DOAJ |
| description | Abstract The main obstacle to large scale quantum computing are the errors present in every physical qubit realization. Correcting these errors requires a large number of additional qubits. Two main avenues to reduce this overhead are (i) low-density parity check (LDPC) codes requiring very few additional qubits to correct errors (ii) cat qubits where bit-flip errors are exponentially suppressed by design. In this work, we combine both approaches to obtain an extremely low overhead architecture. Assuming a physical phase-flip error probability ϵ ≈ 0.1% per qubit and operation, one hundred logical qubits can be implemented on a 758 cat qubit chip, with a total logical error probability per cycle and per logical qubit ϵ L ≤ 10−8. Our architecture also features two major advantages. First, the hardware implementation of the code can be realised with short-range qubit interactions in 2D and low-weight stabilizers, under constraints similar to those of the popular surface code architecture. Second, we demonstrate how to implement a fault-tolerant universal set of logical gates with an additional layer of routing cat qubits stacked on top of the LDPC layer, while maintaining the local connectivity. Furthermore, our architecture benefits from a high capacity of parallelization for these logical gates. |
| format | Article |
| id | doaj-art-64c80e9437aa42ebab507215996d4b7d |
| institution | Kabale University |
| issn | 2041-1723 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | Nature Portfolio |
| record_format | Article |
| series | Nature Communications |
| spelling | doaj-art-64c80e9437aa42ebab507215996d4b7d2025-01-26T12:41:51ZengNature PortfolioNature Communications2041-17232025-01-0116111010.1038/s41467-025-56298-8LDPC-cat codes for low-overhead quantum computing in 2DDiego Ruiz0Jérémie Guillaud1Anthony Leverrier2Mazyar Mirrahimi3Christophe Vuillot4Alice & BobAlice & BobInria ParisLaboratoire de Physique de l’École Normale Supérieure, École Normale Supérieure, Centre Automatique et Systèmes, Mines Paris, Université PSL, CNRS, InriaUniversité de Lorraine, CNRS, Inria, LORIAAbstract The main obstacle to large scale quantum computing are the errors present in every physical qubit realization. Correcting these errors requires a large number of additional qubits. Two main avenues to reduce this overhead are (i) low-density parity check (LDPC) codes requiring very few additional qubits to correct errors (ii) cat qubits where bit-flip errors are exponentially suppressed by design. In this work, we combine both approaches to obtain an extremely low overhead architecture. Assuming a physical phase-flip error probability ϵ ≈ 0.1% per qubit and operation, one hundred logical qubits can be implemented on a 758 cat qubit chip, with a total logical error probability per cycle and per logical qubit ϵ L ≤ 10−8. Our architecture also features two major advantages. First, the hardware implementation of the code can be realised with short-range qubit interactions in 2D and low-weight stabilizers, under constraints similar to those of the popular surface code architecture. Second, we demonstrate how to implement a fault-tolerant universal set of logical gates with an additional layer of routing cat qubits stacked on top of the LDPC layer, while maintaining the local connectivity. Furthermore, our architecture benefits from a high capacity of parallelization for these logical gates.https://doi.org/10.1038/s41467-025-56298-8 |
| spellingShingle | Diego Ruiz Jérémie Guillaud Anthony Leverrier Mazyar Mirrahimi Christophe Vuillot LDPC-cat codes for low-overhead quantum computing in 2D Nature Communications |
| title | LDPC-cat codes for low-overhead quantum computing in 2D |
| title_full | LDPC-cat codes for low-overhead quantum computing in 2D |
| title_fullStr | LDPC-cat codes for low-overhead quantum computing in 2D |
| title_full_unstemmed | LDPC-cat codes for low-overhead quantum computing in 2D |
| title_short | LDPC-cat codes for low-overhead quantum computing in 2D |
| title_sort | ldpc cat codes for low overhead quantum computing in 2d |
| url | https://doi.org/10.1038/s41467-025-56298-8 |
| work_keys_str_mv | AT diegoruiz ldpccatcodesforlowoverheadquantumcomputingin2d AT jeremieguillaud ldpccatcodesforlowoverheadquantumcomputingin2d AT anthonyleverrier ldpccatcodesforlowoverheadquantumcomputingin2d AT mazyarmirrahimi ldpccatcodesforlowoverheadquantumcomputingin2d AT christophevuillot ldpccatcodesforlowoverheadquantumcomputingin2d |