Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer
Achieving quantum speedups in practical tasks remains challenging for current noisy intermediate-scale quantum (NISQ) devices. These devices always encounter significant obstacles such as inevitable physical errors and the limited scalability of current near-term algorithms. Meanwhile, assuming a ty...
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| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
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American Physical Society
2025-05-01
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| Series: | Physical Review X |
| Online Access: | http://doi.org/10.1103/PhysRevX.15.021057 |
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| author | Riki Toshio Yutaro Akahoshi Jun Fujisaki Hirotaka Oshima Shintaro Sato Keisuke Fujii |
| author_facet | Riki Toshio Yutaro Akahoshi Jun Fujisaki Hirotaka Oshima Shintaro Sato Keisuke Fujii |
| author_sort | Riki Toshio |
| collection | DOAJ |
| description | Achieving quantum speedups in practical tasks remains challenging for current noisy intermediate-scale quantum (NISQ) devices. These devices always encounter significant obstacles such as inevitable physical errors and the limited scalability of current near-term algorithms. Meanwhile, assuming a typical architecture for fault-tolerant quantum computing (FTQC), realistic applications inevitably require a vast number of qubits, typically exceeding 10^{6}, which seems far beyond near-term realization. In this work, to bridge the gap between the NISQ and FTQC eras, we propose an alternative approach to achieve practical quantum advantages on early-FTQC devices. Our framework is based on partially fault-tolerant logical operations to minimize spatial overhead and avoids the costly distillation techniques typically required for executing non-Clifford gates. To this end, we develop a space-time efficient state preparation protocol to generate an ancillary non-Clifford state consumed for implementing an analog rotation gate with an arbitrary small angle θ and a remarkably low worst-case error rate below O(|θ|p_{ph}), where p_{ph} is the physical error rate. Furthermore, we propose several error suppression schemes tailored to our preparation protocol, which are essential to minimize the overhead for mitigating errors. Based on this framework, we present several promising applications that leverage the potential of our framework, including the Trotter simulation and quantum phase estimation (QPE). Notably, we demonstrate that our framework allows us to perform the QPE for an (8×8)-site Hubbard model with fewer than 6.8×10^{4} qubits and an execution time of 10.6 days (or 14 min with full parallelization) under p_{ph}=10^{-4}, which is significantly faster than recent classical estimation with tensor network techniques (density matrix renormalization group and projected entangled pair states). |
| format | Article |
| id | doaj-art-620c0396ca094052b7cb874f3d8dfb7b |
| institution | OA Journals |
| issn | 2160-3308 |
| language | English |
| publishDate | 2025-05-01 |
| publisher | American Physical Society |
| record_format | Article |
| series | Physical Review X |
| spelling | doaj-art-620c0396ca094052b7cb874f3d8dfb7b2025-08-20T02:30:35ZengAmerican Physical SocietyPhysical Review X2160-33082025-05-0115202105710.1103/PhysRevX.15.021057Practical Quantum Advantage on Partially Fault-Tolerant Quantum ComputerRiki ToshioYutaro AkahoshiJun FujisakiHirotaka OshimaShintaro SatoKeisuke FujiiAchieving quantum speedups in practical tasks remains challenging for current noisy intermediate-scale quantum (NISQ) devices. These devices always encounter significant obstacles such as inevitable physical errors and the limited scalability of current near-term algorithms. Meanwhile, assuming a typical architecture for fault-tolerant quantum computing (FTQC), realistic applications inevitably require a vast number of qubits, typically exceeding 10^{6}, which seems far beyond near-term realization. In this work, to bridge the gap between the NISQ and FTQC eras, we propose an alternative approach to achieve practical quantum advantages on early-FTQC devices. Our framework is based on partially fault-tolerant logical operations to minimize spatial overhead and avoids the costly distillation techniques typically required for executing non-Clifford gates. To this end, we develop a space-time efficient state preparation protocol to generate an ancillary non-Clifford state consumed for implementing an analog rotation gate with an arbitrary small angle θ and a remarkably low worst-case error rate below O(|θ|p_{ph}), where p_{ph} is the physical error rate. Furthermore, we propose several error suppression schemes tailored to our preparation protocol, which are essential to minimize the overhead for mitigating errors. Based on this framework, we present several promising applications that leverage the potential of our framework, including the Trotter simulation and quantum phase estimation (QPE). Notably, we demonstrate that our framework allows us to perform the QPE for an (8×8)-site Hubbard model with fewer than 6.8×10^{4} qubits and an execution time of 10.6 days (or 14 min with full parallelization) under p_{ph}=10^{-4}, which is significantly faster than recent classical estimation with tensor network techniques (density matrix renormalization group and projected entangled pair states).http://doi.org/10.1103/PhysRevX.15.021057 |
| spellingShingle | Riki Toshio Yutaro Akahoshi Jun Fujisaki Hirotaka Oshima Shintaro Sato Keisuke Fujii Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer Physical Review X |
| title | Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer |
| title_full | Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer |
| title_fullStr | Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer |
| title_full_unstemmed | Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer |
| title_short | Practical Quantum Advantage on Partially Fault-Tolerant Quantum Computer |
| title_sort | practical quantum advantage on partially fault tolerant quantum computer |
| url | http://doi.org/10.1103/PhysRevX.15.021057 |
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