Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure

We have proposed a structural design for a single photon avalanche diode with a low breakdown voltage. This diode is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm HV CMOS technology, and it can maintain a high operating excess voltage in an n-on-p design witho...

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Main Authors: Jau Yang Wu, Chun-Hsien Liu
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Photonics Journal
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10419002/
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_version_ 1849707796708196352
author Jau Yang Wu
Chun-Hsien Liu
author_facet Jau Yang Wu
Chun-Hsien Liu
author_sort Jau Yang Wu
collection DOAJ
description We have proposed a structural design for a single photon avalanche diode with a low breakdown voltage. This diode is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm HV CMOS technology, and it can maintain a high operating excess voltage in an n-on-p design without requiring any additional customized well layers. The n-on-p type device is particularly advantageous for a 3D-stacked backside illuminated structure and offers excellent photon detection capabilities at longer wavelengths. By incorporating a high doping concentration PDD well layer, we can significantly increase the excess bias, resulting in enhanced photon detection probability in the near-infrared wavelength range, all while maintaining a lower voltage due to a reduction in breakdown voltage. This design also leads to power consumption savings. As a result, our designed device is well-suited for consumer applications such as 3D image rendering and LiDAR technology.
format Article
id doaj-art-6004e8e10da149088a31d03efbbb5453
institution DOAJ
issn 1943-0655
language English
publishDate 2024-01-01
publisher IEEE
record_format Article
series IEEE Photonics Journal
spelling doaj-art-6004e8e10da149088a31d03efbbb54532025-08-20T03:15:50ZengIEEEIEEE Photonics Journal1943-06552024-01-011621810.1109/JPHOT.2024.336173210419002Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well StructureJau Yang Wu0https://orcid.org/0000-0003-1484-3677Chun-Hsien Liu1https://orcid.org/0009-0006-2841-3503Department of Electrical Engineering, Yuan Ze University, Taoyuan, TaiwanInstitute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, TaiwanWe have proposed a structural design for a single photon avalanche diode with a low breakdown voltage. This diode is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm HV CMOS technology, and it can maintain a high operating excess voltage in an n-on-p design without requiring any additional customized well layers. The n-on-p type device is particularly advantageous for a 3D-stacked backside illuminated structure and offers excellent photon detection capabilities at longer wavelengths. By incorporating a high doping concentration PDD well layer, we can significantly increase the excess bias, resulting in enhanced photon detection probability in the near-infrared wavelength range, all while maintaining a lower voltage due to a reduction in breakdown voltage. This design also leads to power consumption savings. As a result, our designed device is well-suited for consumer applications such as 3D image rendering and LiDAR technology.https://ieeexplore.ieee.org/document/10419002/Single photon avalanche diodephoto detectorCMOS sensorLiDAR
spellingShingle Jau Yang Wu
Chun-Hsien Liu
Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
IEEE Photonics Journal
Single photon avalanche diode
photo detector
CMOS sensor
LiDAR
title Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
title_full Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
title_fullStr Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
title_full_unstemmed Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
title_short Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
title_sort designing a sub 20v breakdown voltage spad with standard cmos technology and n x002f p well structure
topic Single photon avalanche diode
photo detector
CMOS sensor
LiDAR
url https://ieeexplore.ieee.org/document/10419002/
work_keys_str_mv AT jauyangwu designingasub20vbreakdownvoltagespadwithstandardcmostechnologyandnx002fpwellstructure
AT chunhsienliu designingasub20vbreakdownvoltagespadwithstandardcmostechnologyandnx002fpwellstructure