Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer
In this letter, a high performance and large area feasible top-gate low-temperature polysilicon thin film transistor (LTPS TFT) technology is reported. The poly-Si active layer was formed by crystallizing the plasma enhanced chemical vapor deposited (PECVD) amorphous silicon (a-Si) film using the bl...
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| Format: | Article |
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IEEE
2024-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
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| Online Access: | https://ieeexplore.ieee.org/document/10506233/ |
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| author | Hongyuan Xu Guangmiao Wan Xu Wang Xiaoliang Zhou Jing Liu Jinming Li Lei Lu Shengdong Zhang |
| author_facet | Hongyuan Xu Guangmiao Wan Xu Wang Xiaoliang Zhou Jing Liu Jinming Li Lei Lu Shengdong Zhang |
| author_sort | Hongyuan Xu |
| collection | DOAJ |
| description | In this letter, a high performance and large area feasible top-gate low-temperature polysilicon thin film transistor (LTPS TFT) technology is reported. The poly-Si active layer was formed by crystallizing the plasma enhanced chemical vapor deposited (PECVD) amorphous silicon (a-Si) film using the blue laser diode anneal (BLDA) technique. The low resistance of source-drain (S/D) regions were formed from a heavily-doped PECVD a-Si layer. The fabricated top-gate LTPS TFTs exhibit excellent electrical performances, with the carrier mobility more than 556.66 cm2/V-s and on/off-current ratio over <inline-formula> <tex-math notation="LaTeX">$1.58\times 10^{7}$ </tex-math></inline-formula>. This proposed technology is expected to promote the manufacturing lines to the higher generations. |
| format | Article |
| id | doaj-art-5fdaabb3fffa45bebfbb6305bec25679 |
| institution | OA Journals |
| issn | 2168-6734 |
| language | English |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj-art-5fdaabb3fffa45bebfbb6305bec256792025-08-20T02:35:57ZengIEEEIEEE Journal of the Electron Devices Society2168-67342024-01-011236536810.1109/JEDS.2024.339218310506233Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ LayerHongyuan Xu0Guangmiao Wan1Xu Wang2https://orcid.org/0000-0003-1584-089XXiaoliang Zhou3Jing Liu4Jinming Li5Lei Lu6https://orcid.org/0000-0001-5275-2181Shengdong Zhang7https://orcid.org/0000-0002-1815-8661School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, ChinaTCL-CSOT, Shenzhen, ChinaTCL-CSOT, Shenzhen, ChinaTCL-CSOT, Shenzhen, ChinaTCL-CSOT, Shenzhen, ChinaTCL-CSOT, Shenzhen, ChinaSchool of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, ChinaSchool of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, ChinaIn this letter, a high performance and large area feasible top-gate low-temperature polysilicon thin film transistor (LTPS TFT) technology is reported. The poly-Si active layer was formed by crystallizing the plasma enhanced chemical vapor deposited (PECVD) amorphous silicon (a-Si) film using the blue laser diode anneal (BLDA) technique. The low resistance of source-drain (S/D) regions were formed from a heavily-doped PECVD a-Si layer. The fabricated top-gate LTPS TFTs exhibit excellent electrical performances, with the carrier mobility more than 556.66 cm2/V-s and on/off-current ratio over <inline-formula> <tex-math notation="LaTeX">$1.58\times 10^{7}$ </tex-math></inline-formula>. This proposed technology is expected to promote the manufacturing lines to the higher generations.https://ieeexplore.ieee.org/document/10506233/Low temperature polysiliconthin film transistorsblue laser diode annealing |
| spellingShingle | Hongyuan Xu Guangmiao Wan Xu Wang Xiaoliang Zhou Jing Liu Jinming Li Lei Lu Shengdong Zhang Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer IEEE Journal of the Electron Devices Society Low temperature polysilicon thin film transistors blue laser diode annealing |
| title | Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer |
| title_full | Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer |
| title_fullStr | Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer |
| title_full_unstemmed | Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer |
| title_short | Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n+ Layer |
| title_sort | blue laser diode annealed top gate low temperature poly si tfts with low resistance of source drain from deposited n layer |
| topic | Low temperature polysilicon thin film transistors blue laser diode annealing |
| url | https://ieeexplore.ieee.org/document/10506233/ |
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