A zero voltage transition interleaved DC-DC converter with reduced voltage stress

This paper presents an interleaved converter designed to achieve a high voltage gain using a combination of coupled inductors and switched capacitors. Additionally, the converter incorporates winding-cross-coupled inductors to reduce input current ripple and enhance voltage gain. The use of switche...

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Bibliographic Details
Main Authors: Hosein Talgini, Majid Delshad, Ramtin Sadeghi
Format: Article
Language:English
Published: OICC Press 2025-03-01
Series:Majlesi Journal of Electrical Engineering
Subjects:
Online Access:https://oiccpress.com/mjee/article/view/10868
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Summary:This paper presents an interleaved converter designed to achieve a high voltage gain using a combination of coupled inductors and switched capacitors. Additionally, the converter incorporates winding-cross-coupled inductors to reduce input current ripple and enhance voltage gain. The use of switches with smaller RDS(on) can be achieved by reducing the switch voltage stress through the high voltage gain. Additionally, the switches operate under zero-voltage (ZV) conditions and do not have capacitive turn-on losses,  resulting in reduced conductive losses. The proposed auxiliary circuit has a small number of elements and can be expanded to include more parallel branches. The converter’s theoretical analysis was thoroughly examined and confirmed through the development of a prototype. Experimental results demonstrate a 6% improvement in efficiency and a 14 dBμV reduction in EMI in comparison to the conventional hard-switching design without auxiliary circuit.
ISSN:2345-377X
2345-3796