A Practical Cache Partitioning Method for Multi-Core Processor on a Commercial Safety-Critical Partitioned RTOS
In modern airborne systems, software plays a crucial role for meeting functional, safety, and performance requirements. Integrated Modular Avionics (IMA) and multi-core processors (MCPs) are also adopted for hardware to enhance performance and Space, Weight, and Power (SWaP). While MCPs improve effi...
Saved in:
Main Author: | Taeho Kim |
---|---|
Format: | Article |
Language: | English |
Published: |
IEEE
2025-01-01
|
Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/10870213/ |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Learning-based page replacement scheme for efficient I/O processing
by: Hwajung Kim
Published: (2025-02-01) -
Partition regularity of Pythagorean pairs
by: Nikos Frantzikinakis, et al.
Published: (2025-01-01) -
EFFICACY OF TAX PAYERS’ PERCEPTION ON TAX COMPLIANCE LEVEL AMONG SMEs IN ILORIN METROPOLIS
by: Daud Omotosho Saheed, et al.
Published: (2022-12-01) -
Rethinking Advanced Driver Assistance System taxonomies: A framework and inventory of real-world safety performance
by: Ksander N de Winkel, et al.
Published: (2025-01-01) -
Carrollian partition functions and the flat limit of AdS
by: Per Kraus, et al.
Published: (2025-01-01)