Implementation of Power Efficient Flash Analogue-to-Digital Converter
An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC) is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder....
Saved in:
| Main Authors: | Taninki Sai Lakshmi, Avireni Srinivasulu, Pittala Chandra Shaker |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2014-01-01
|
| Series: | Active and Passive Electronic Components |
| Online Access: | http://dx.doi.org/10.1155/2014/723053 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Three Microwave Frequency Dividers Using Current Source/Sink and Modified Current Source Inverters
by: Gautham S. Harinarayan, et al.
Published: (2013-01-01) -
ULPD and CPTL Pull-Up Stages for Differential Cascode Voltage Switch Logic
by: Avireni Srinivasulu, et al.
Published: (2013-01-01) -
320 GHz photonic-electronic analogue-to-digital converter (ADC) exploiting Kerr soliton microcombs
by: Dengyang Fang, et al.
Published: (2025-07-01) -
A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor
by: Mostafa Chakir, et al.
Published: (2017-01-01) -
An RRAM-based implementation of a template matching circuit for low-power analogue classification
by: Patrick Foster, et al.
Published: (2025-04-01)