HIGH-SPEED MULTIPLIER DESIGN BASED ON AN OPTIMIZED PARALLEL PREFIX TREE ARCHITECTURE
Multiplication is a fundamental arithmetic operation, central to the performance of arithmetic and logic units (ALUs) in nearly all electronic systems. As such, the design and optimization of multipliers play a crucial role in improving the efficiency of integrated circuits, particularly in applicat...
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
XLESCIENCE
2025-06-01
|
| Series: | International Journal of Advances in Signal and Image Sciences |
| Subjects: | |
| Online Access: | https://xlescience.org/index.php/IJASIS/article/view/274 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|