Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training
A Probabilistic Bit (P-Bit) device serves as the core hardware for implementing Ising computation. However, the severe intrinsic variations of stochastic P-Bit devices hinder the large-scale expansion of the P-Bit array, significantly limiting the practical usage of Ising computation. In this work,...
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2025-01-01
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| author | Bolin Zhang Yu Liu Tianqi Gao Jialiang Yin Zhenyu Guan Deming Zhang Lang Zeng |
| author_facet | Bolin Zhang Yu Liu Tianqi Gao Jialiang Yin Zhenyu Guan Deming Zhang Lang Zeng |
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| description | A Probabilistic Bit (P-Bit) device serves as the core hardware for implementing Ising computation. However, the severe intrinsic variations of stochastic P-Bit devices hinder the large-scale expansion of the P-Bit array, significantly limiting the practical usage of Ising computation. In this work, a behavioral model which attributes P-Bit variations to two parameters, <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>Δ</mo><mi>V</mi></mrow></semantics></math></inline-formula>, is proposed. Then the weight compensation method is introduced, which can mitigate <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>Δ</mo><mi>V</mi></mrow></semantics></math></inline-formula> of P-Bit device variations by rederiving the weight matrix, enabling them to compute as ideal identical P-Bits without the need for weights retraining. Accurately extracting the <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>Δ</mo><mi>V</mi></mrow></semantics></math></inline-formula> simultaneously from a large P-Bit array which is prerequisite for the weight compensation method is a crucial and challenging task. To solve this obstacle, we present the novel automatic variation extraction algorithm which can extract device variations of each P-Bit in a large array based on Boltzmann machine learning. In order for the accurate extraction of variations from an extendable P-Bit array, an Ising Hamiltonian based on a 3D ferromagnetic model is constructed, achieving precise and scalable array variation extraction. The proposed Automatic Extraction and Compensation algorithm is utilized to solve both 16-city traveling salesman problem (TSP) and 21-bit integer factorization on a large P-Bit array with variation, demonstrating its accuracy, transferability, and scalability. |
| format | Article |
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| spelling | doaj-art-4d0d0f45d0b24fd1b466acdefb5eedb92025-08-20T03:12:12ZengMDPI AGMicromachines2072-666X2025-01-0116213310.3390/mi16020133Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine TrainingBolin Zhang0Yu Liu1Tianqi Gao2Jialiang Yin3Zhenyu Guan4Deming Zhang5Lang Zeng6National Key Laboratory of Spintronics, Hangzhou International Innovation Institute, Beihang University, Hangzhou 311115, ChinaNational Key Laboratory of Spintronics, Hangzhou International Innovation Institute, Beihang University, Hangzhou 311115, ChinaNational Key Laboratory of Spintronics, Hangzhou International Innovation Institute, Beihang University, Hangzhou 311115, ChinaNational Key Laboratory of Spintronics, Hangzhou International Innovation Institute, Beihang University, Hangzhou 311115, ChinaSchool of Cyber Science and Technology, Beihang University, Beijing 100191, ChinaNational Key Laboratory of Spintronics, Hangzhou International Innovation Institute, Beihang University, Hangzhou 311115, ChinaNational Key Laboratory of Spintronics, Hangzhou International Innovation Institute, Beihang University, Hangzhou 311115, ChinaA Probabilistic Bit (P-Bit) device serves as the core hardware for implementing Ising computation. However, the severe intrinsic variations of stochastic P-Bit devices hinder the large-scale expansion of the P-Bit array, significantly limiting the practical usage of Ising computation. In this work, a behavioral model which attributes P-Bit variations to two parameters, <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>Δ</mo><mi>V</mi></mrow></semantics></math></inline-formula>, is proposed. Then the weight compensation method is introduced, which can mitigate <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>Δ</mo><mi>V</mi></mrow></semantics></math></inline-formula> of P-Bit device variations by rederiving the weight matrix, enabling them to compute as ideal identical P-Bits without the need for weights retraining. Accurately extracting the <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>Δ</mo><mi>V</mi></mrow></semantics></math></inline-formula> simultaneously from a large P-Bit array which is prerequisite for the weight compensation method is a crucial and challenging task. To solve this obstacle, we present the novel automatic variation extraction algorithm which can extract device variations of each P-Bit in a large array based on Boltzmann machine learning. In order for the accurate extraction of variations from an extendable P-Bit array, an Ising Hamiltonian based on a 3D ferromagnetic model is constructed, achieving precise and scalable array variation extraction. The proposed Automatic Extraction and Compensation algorithm is utilized to solve both 16-city traveling salesman problem (TSP) and 21-bit integer factorization on a large P-Bit array with variation, demonstrating its accuracy, transferability, and scalability.https://www.mdpi.com/2072-666X/16/2/133spintronicsmagnetic tunneling junctionIsing computationBoltzmann machine trainingtraveling salesman probleminteger factorization |
| spellingShingle | Bolin Zhang Yu Liu Tianqi Gao Jialiang Yin Zhenyu Guan Deming Zhang Lang Zeng Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training Micromachines spintronics magnetic tunneling junction Ising computation Boltzmann machine training traveling salesman problem integer factorization |
| title | Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training |
| title_full | Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training |
| title_fullStr | Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training |
| title_full_unstemmed | Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training |
| title_short | Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training |
| title_sort | automatic extraction and compensation of p bit device variations in large array utilizing boltzmann machine training |
| topic | spintronics magnetic tunneling junction Ising computation Boltzmann machine training traveling salesman problem integer factorization |
| url | https://www.mdpi.com/2072-666X/16/2/133 |
| work_keys_str_mv | AT bolinzhang automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining AT yuliu automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining AT tianqigao automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining AT jialiangyin automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining AT zhenyuguan automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining AT demingzhang automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining AT langzeng automaticextractionandcompensationofpbitdevicevariationsinlargearrayutilizingboltzmannmachinetraining |