FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs
Recurrent Neural Networks (RNNs) are pivotal in artificial intelligence, excelling in tasks involving sequential data across fields such as natural language processing and time-series forecasting. FPGAs have emerged as an efficient technology for accelerating these algorithms, especially in resource...
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| Format: | Article |
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IEEE
2025-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/11027895/ |
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| author | Tommaso Pacini Pietro Nannipieri Silvia Moranti Luca Fanucci |
| author_facet | Tommaso Pacini Pietro Nannipieri Silvia Moranti Luca Fanucci |
| author_sort | Tommaso Pacini |
| collection | DOAJ |
| description | Recurrent Neural Networks (RNNs) are pivotal in artificial intelligence, excelling in tasks involving sequential data across fields such as natural language processing and time-series forecasting. FPGAs have emerged as an efficient technology for accelerating these algorithms, especially in resource- and power-constrained platforms such as edge devices. To improve the accessibility of this technology, both academia and industry are exploring the design of automation toolflows. This article proposes FPG-AI RNN, a novel technology-agnostic RNN-to-FPGA framework that enables the fast deployment of LSTM- and GRU-based models on FPGAs belonging to different vendors and with diverse resource budgets, outclassing state-of-the-art solutions in terms of device portability. The toolflow leverages post-training compression techniques to reduce model complexity and streamline implementation. The developed accelerator is a highly tunable Hardware Description Language (HDL)-based architecture featuring no third-party Intellectual Properties (IPs). An iterative algorithm explores the parameters’ space of the underlying architecture, selecting a point that meets the user-defined constraints on the target RNN-FPGA pair, resource consumption, and performance. To demonstrate the technology independence of our solution, we collect results for a heterogeneous set of models on low/mid/high range FPGAs belonging to AMD Xilinx, Intel, and Microchip. A comparison with state-of-the-art solutions targeting an LSTM-based model for sentence classification highlights the unmatched device portability of FPG-AI RNN and shows metrics (inference time, resource utilization, power consumption, post-quantization accuracy) on par with the best available solutions. |
| format | Article |
| id | doaj-art-4833d414261f416aa3a9a8d2f3f9255e |
| institution | DOAJ |
| issn | 2169-3536 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj-art-4833d414261f416aa3a9a8d2f3f9255e2025-08-20T02:40:27ZengIEEEIEEE Access2169-35362025-01-011310035310036910.1109/ACCESS.2025.357790811027895FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAsTommaso Pacini0https://orcid.org/0000-0001-8551-717XPietro Nannipieri1https://orcid.org/0000-0002-2538-5440Silvia Moranti2Luca Fanucci3https://orcid.org/0000-0001-5426-4974Department of Information Engineering, University of Pisa, Pisa, ItalyDepartment of Information Engineering, University of Pisa, Pisa, ItalyEuropean Space Research and Technology Centre, European Space Agency (ESA), Noordwijk, The NetherlandsDepartment of Information Engineering, University of Pisa, Pisa, ItalyRecurrent Neural Networks (RNNs) are pivotal in artificial intelligence, excelling in tasks involving sequential data across fields such as natural language processing and time-series forecasting. FPGAs have emerged as an efficient technology for accelerating these algorithms, especially in resource- and power-constrained platforms such as edge devices. To improve the accessibility of this technology, both academia and industry are exploring the design of automation toolflows. This article proposes FPG-AI RNN, a novel technology-agnostic RNN-to-FPGA framework that enables the fast deployment of LSTM- and GRU-based models on FPGAs belonging to different vendors and with diverse resource budgets, outclassing state-of-the-art solutions in terms of device portability. The toolflow leverages post-training compression techniques to reduce model complexity and streamline implementation. The developed accelerator is a highly tunable Hardware Description Language (HDL)-based architecture featuring no third-party Intellectual Properties (IPs). An iterative algorithm explores the parameters’ space of the underlying architecture, selecting a point that meets the user-defined constraints on the target RNN-FPGA pair, resource consumption, and performance. To demonstrate the technology independence of our solution, we collect results for a heterogeneous set of models on low/mid/high range FPGAs belonging to AMD Xilinx, Intel, and Microchip. A comparison with state-of-the-art solutions targeting an LSTM-based model for sentence classification highlights the unmatched device portability of FPG-AI RNN and shows metrics (inference time, resource utilization, power consumption, post-quantization accuracy) on par with the best available solutions.https://ieeexplore.ieee.org/document/11027895/Automationdeep learningedge computingframeworkFPGAhardware accelerator |
| spellingShingle | Tommaso Pacini Pietro Nannipieri Silvia Moranti Luca Fanucci FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs IEEE Access Automation deep learning edge computing framework FPGA hardware accelerator |
| title | FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs |
| title_full | FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs |
| title_fullStr | FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs |
| title_full_unstemmed | FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs |
| title_short | FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs |
| title_sort | fpg ai rnn a technology agnostic framework for the automatic acceleration of lstm gru based models on fpgas |
| topic | Automation deep learning edge computing framework FPGA hardware accelerator |
| url | https://ieeexplore.ieee.org/document/11027895/ |
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