Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication
This article develops an energy-efficient 3D multi-band I/O interface to meet the demand for high computation and improve battery life for future mobile memory interfaces exploiting 3D integration. The proposed multi-band I/O (MBI) interface utilizes 3D integration, for two radio frequency band tran...
Saved in:
| Main Author: | |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Taylor & Francis Group
2025-01-01
|
| Series: | Automatika |
| Subjects: | |
| Online Access: | https://www.tandfonline.com/doi/10.1080/00051144.2024.2444758 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1832582084501176320 |
|---|---|
| author | Ahmed Alzahmi |
| author_facet | Ahmed Alzahmi |
| author_sort | Ahmed Alzahmi |
| collection | DOAJ |
| description | This article develops an energy-efficient 3D multi-band I/O interface to meet the demand for high computation and improve battery life for future mobile memory interfaces exploiting 3D integration. The proposed multi-band I/O (MBI) interface utilizes 3D integration, for two radio frequency band transceivers, and a CMOS driver with resistive feedback for the baseband (BB) transceiver. The proposed design implements a band-selective transformer to enable transmitting three bands, baseband and 2 RF bands (10&30 GHz), simultaneously. To enable simultaneous transmission of three bands, a band-selective transformer is utilized that reduces signal interference and minimizes component area and distortion for high-quality transmission and design compactness. A narrowband low-noise amplifier combined with the 30 GHz radio frequency band to improve the signal quality and minimize distortion. Furthermore, a low-dropout voltage regulator (LDO) is utilized to raise the frequency and lower the supply voltage for the I/O interface more especially, the connection between the memory and the CPU. The aggregate bandwidth and energy efficiency are greatly increased by this architecture, raising the aggregate data rate and enhancing energy efficiency. The 3D MBI system was implemented in the 130 nm CMOS process technology. It obtains a higher aggregate data rate of 14.4 Gb/s and an energy efficiency of 2.6 pJ/b compared with prior works. |
| format | Article |
| id | doaj-art-37cfdd4efcd5414cb7c64befde587345 |
| institution | Kabale University |
| issn | 0005-1144 1848-3380 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | Taylor & Francis Group |
| record_format | Article |
| series | Automatika |
| spelling | doaj-art-37cfdd4efcd5414cb7c64befde5873452025-01-30T05:18:09ZengTaylor & Francis GroupAutomatika0005-11441848-33802025-01-01661697810.1080/00051144.2024.2444758Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communicationAhmed Alzahmi0Department of Electrical Engineering, Faculty of Engineering, University of Tabuk, Tabuk, Kingdom of Saudi ArabiaThis article develops an energy-efficient 3D multi-band I/O interface to meet the demand for high computation and improve battery life for future mobile memory interfaces exploiting 3D integration. The proposed multi-band I/O (MBI) interface utilizes 3D integration, for two radio frequency band transceivers, and a CMOS driver with resistive feedback for the baseband (BB) transceiver. The proposed design implements a band-selective transformer to enable transmitting three bands, baseband and 2 RF bands (10&30 GHz), simultaneously. To enable simultaneous transmission of three bands, a band-selective transformer is utilized that reduces signal interference and minimizes component area and distortion for high-quality transmission and design compactness. A narrowband low-noise amplifier combined with the 30 GHz radio frequency band to improve the signal quality and minimize distortion. Furthermore, a low-dropout voltage regulator (LDO) is utilized to raise the frequency and lower the supply voltage for the I/O interface more especially, the connection between the memory and the CPU. The aggregate bandwidth and energy efficiency are greatly increased by this architecture, raising the aggregate data rate and enhancing energy efficiency. The 3D MBI system was implemented in the 130 nm CMOS process technology. It obtains a higher aggregate data rate of 14.4 Gb/s and an energy efficiency of 2.6 pJ/b compared with prior works.https://www.tandfonline.com/doi/10.1080/00051144.2024.2444758RF bandmulti-bandbasebandI/O interfeacethree-dimensional (3D)memory |
| spellingShingle | Ahmed Alzahmi Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication Automatika RF band multi-band baseband I/O interfeace three-dimensional (3D) memory |
| title | Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication |
| title_full | Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication |
| title_fullStr | Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication |
| title_full_unstemmed | Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication |
| title_short | Energy-efficient 3D multi-band I/O interface for enhanced mobile memory communication |
| title_sort | energy efficient 3d multi band i o interface for enhanced mobile memory communication |
| topic | RF band multi-band baseband I/O interfeace three-dimensional (3D) memory |
| url | https://www.tandfonline.com/doi/10.1080/00051144.2024.2444758 |
| work_keys_str_mv | AT ahmedalzahmi energyefficient3dmultibandiointerfaceforenhancedmobilememorycommunication |