Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP
Unconventional functions, including activation functions and power functions, are extremely hard-to-realize primarily due to the difficulty in arriving at the hierarchical design. The hierarchical design allows the synthesis tool to map the functionality with that of standard cells employed through...
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Main Authors: | H. C. Prashanth, Madhav Rao |
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Format: | Article |
Language: | English |
Published: |
Wiley
2024-01-01
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Series: | IET Computers & Digital Techniques |
Online Access: | http://dx.doi.org/10.1049/2024/6623637 |
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