APA (7th ed.) Citation

Prashanth, H. C., & Rao, M. Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP. Wiley.

Chicago Style (17th ed.) Citation

Prashanth, H. C., and Madhav Rao. Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP. Wiley.

MLA (9th ed.) Citation

Prashanth, H. C., and Madhav Rao. Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP. Wiley.

Warning: These citations may not always be 100% accurate.