Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications
As CMOS technology has advanced, the transistor integration density of static random-access memory (SRAM) cells has increased. This has led to a reduction in the critical charge of sensitive nodes, making the SRAM cells more susceptible to soft errors. When high-energy particles in space strike the...
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MDPI AG
2025-01-01
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| author | Jong-Yeob Oh Sung-Hun Jo |
| author_facet | Jong-Yeob Oh Sung-Hun Jo |
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| description | As CMOS technology has advanced, the transistor integration density of static random-access memory (SRAM) cells has increased. This has led to a reduction in the critical charge of sensitive nodes, making the SRAM cells more susceptible to soft errors. When high-energy particles in space strike the sensitive nodes of an SRAM cell, a single-event upset (SEU) can occur, altering the stored data. Additionally, the charge-sharing effect between transistors can cause single-event multi-node upsets (SEMNUs). To address these challenges, this paper proposes a radiation-hardened 16T SRAM cell optimized for stability and power, referred to as RHSP16T. The performance of the proposed RHSP16T cell was compared with other radiation-hardened SRAM cells, including QUC-CE12T, WE-QUATRO, RHBD10T, RHD12T, and RSP14T. Simulation results indicate that the proposed RHSP16T cell exhibits higher read and write stability, along with lower-leakage power consumption. compared with all other cells. This demonstrates that RHSP16T ensures high reliability for stored data. Furthermore, EQM results show that the RHSP16T cell outperformed the compared designs in overall SRAM cell performance. The proposed integrated circuit was implemented in a 90 nm CMOS process and operated on 1 V supply voltage. |
| format | Article |
| id | doaj-art-32b4f46240be45129c44269bfe2bb9cb |
| institution | Kabale University |
| issn | 2076-3417 |
| language | English |
| publishDate | 2025-01-01 |
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| series | Applied Sciences |
| spelling | doaj-art-32b4f46240be45129c44269bfe2bb9cb2025-01-10T13:15:20ZengMDPI AGApplied Sciences2076-34172025-01-0115137510.3390/app15010375Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite ApplicationsJong-Yeob Oh0Sung-Hun Jo1Department of Nano & Semiconductor Engineering, Tech University of Korea, Siheung 15073, Republic of KoreaDepartment of Nano & Semiconductor Engineering, Tech University of Korea, Siheung 15073, Republic of KoreaAs CMOS technology has advanced, the transistor integration density of static random-access memory (SRAM) cells has increased. This has led to a reduction in the critical charge of sensitive nodes, making the SRAM cells more susceptible to soft errors. When high-energy particles in space strike the sensitive nodes of an SRAM cell, a single-event upset (SEU) can occur, altering the stored data. Additionally, the charge-sharing effect between transistors can cause single-event multi-node upsets (SEMNUs). To address these challenges, this paper proposes a radiation-hardened 16T SRAM cell optimized for stability and power, referred to as RHSP16T. The performance of the proposed RHSP16T cell was compared with other radiation-hardened SRAM cells, including QUC-CE12T, WE-QUATRO, RHBD10T, RHD12T, and RSP14T. Simulation results indicate that the proposed RHSP16T cell exhibits higher read and write stability, along with lower-leakage power consumption. compared with all other cells. This demonstrates that RHSP16T ensures high reliability for stored data. Furthermore, EQM results show that the RHSP16T cell outperformed the compared designs in overall SRAM cell performance. The proposed integrated circuit was implemented in a 90 nm CMOS process and operated on 1 V supply voltage.https://www.mdpi.com/2076-3417/15/1/375critical chargelow-powerread stabilitysatellite applicationssingle-event multi-node upsets (SEMNUs)single-event upset (SEU) |
| spellingShingle | Jong-Yeob Oh Sung-Hun Jo Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications Applied Sciences critical charge low-power read stability satellite applications single-event multi-node upsets (SEMNUs) single-event upset (SEU) |
| title | Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications |
| title_full | Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications |
| title_fullStr | Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications |
| title_full_unstemmed | Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications |
| title_short | Soft Error-Tolerant and Highly Stable Low-Power SRAM for Satellite Applications |
| title_sort | soft error tolerant and highly stable low power sram for satellite applications |
| topic | critical charge low-power read stability satellite applications single-event multi-node upsets (SEMNUs) single-event upset (SEU) |
| url | https://www.mdpi.com/2076-3417/15/1/375 |
| work_keys_str_mv | AT jongyeoboh softerrortolerantandhighlystablelowpowersramforsatelliteapplications AT sunghunjo softerrortolerantandhighlystablelowpowersramforsatelliteapplications |